RTL8196 Просмотр технического описания (PDF) - Realtek Semiconductor

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RTL8196

IEEE 802.11n AP/ROUTER NETWORK PROCESSOR WITH EEE

Realtek Semiconductor 

RTL8196C

Datasheet

List of Figures

FIGURE 1. BLOCK DIAGRAM ........................................................................................................................................................4

FIGURE 2. PIN ASSIGNMENTS .......................................................................................................................................................5

FIGURE 3. ONE 16-BIT, FOR 1M/2M/4M/8M BYTES FLASH CONFIGURATION............................................................................12

FIGURE 4. TYPICAL CONNECTION TO A CRYSTAL ......................................................................................................................29

FIGURE 5. TYPICAL CONNECTION TO AN OSCILLATOR...............................................................................................................29

FIGURE 6. SDRAM CLOCK SPECIFICATIONS-1 ..........................................................................................................................30

FIGURE 7. SDRAM CLOCK SPECIFICATIONS-2 ..........................................................................................................................30

FIGURE 8. SDRAM INPUT TIMING .............................................................................................................................................31

FIGURE 9. SDRAM OUTPUT TIMING .........................................................................................................................................31

FIGURE 10. SDRAM ACCESS CONTROL TIMING .........................................................................................................................32

FIGURE 11. FLASH ACCESS TIMING.............................................................................................................................................33

FIGURE 12. POWER UP SEQUENCE TIMING DIAGRAM .................................................................................................................33

CfoRrOZTNeEFCaIODRlEPtONReTATkIIAOLN FIGURE13. POWERUPCONFIGURATION TIMINGDIAGRAM........................................................................................................34

IEEE 802.11n AP/Router Network Processor with EEE vi

Track ID: JATR-2265-11 Rev. 0.7

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