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ZXCD1010 Просмотр технического описания (PDF) - Zetex => Diodes

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ZXCD1010 Datasheet PDF : 12 Pages
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ZXCD1010
Class D 25W Mono Open Loop (Bridge Tied Load - BTL) Solution – Circuit Description
Proprietary circuit design and high quality magnetics
are necessary to yield the high THD performance
specified. Deviation from the Zetex recommended
solution could significantly degrade performance.
The optional components R17 and C3 form a Zobel
network. The applicability of these depends upon the
application and speaker characteristics. Suggested
values are 47nF and 10 ohms
The speaker is connected as a Bridge Tied Load (BTL).
This means that both sides of the speaker are driven
from the output bridge and therefore neither side of the
speaker connects to ground. This allows maximum
power to be delivered to the load, from a given supply
voltage. The supply voltage for this solution is
nominally 16V for 25W into a 4load.
A schematic diagram for the solution is shown in
Figure 4. The audio input is AC coupled and applied to a
low pass filter and a phase splitter built around the
NE5532 dual op-amp. One of these op-amps is
configured as a voltage follower and the other as a X1
inverting amplifier. This produces in phase and
inverted signals for application to the ZXCD1010. The
op-amp outputs are AC coupled into the ZXCD1010
Audio A and Audio B inputs via simple R-C low pass
filters (R16/C3 and R15/C7). The op-amps are biased to
a DC level of approximately 6V by R11 and R12.
Efficiency
Figure 5 shows the measured efficiency of the Zetex
solution at various power levels into both 4and 8
loads. As a comparison, typical efficiency is plotted for
a class A-B amplifier. They clearly demonstrate the
major efficiency benefits available from the Zetex class
D solution.
The Pulse Width Modulated (PWM) outputs, OutA and
OutB, which contain the audio information, are AC
coupled and DC restored before driving the Zetex
ZXM64P03X and ZXM64N03X PMOS and NMOS
output bridge FET’s. AC coupling is via C17, C18, C19
and C20. DC restoration is provided by the D2(A1a)/R4,
D1(A4a)/R2 and D3(A1a)/R6, D4(A4a)/R9 components.
This technique allows the output stage supply voltage
to be higher than the high level of the OutA and OutB
outputs (approximately 8.5V), whilst still supplying
almost the full output voltage swing to the gates of the
bridge FET’s (thereby ensuring good turn on). This can
be exploited to yield higher power solutions with
higher supply voltages – this is discussed later.
The resistor/diode combinations (R5/D2(A16b),
R3/D1(A4b), R7/D3(A1b) and R8/D4(A4b)) in series with
the bridge FET gates, assist in controlling the switching
of the bridge FET’s. This design minimises shoot
through currents whilst still achieving the low
distortion characteristics of the system.
The purpose of the special inductors in conjunction
with the output capacitors C23, C24, C25 and C26 is to
low pass filter the high frequency switching PWM
signal that comes from the bridge. Thus the lower
frequency audio signal is recovered and is available at
the speakerA and speakerB outputs across which the
speaker should be connected. Zetex can offer advice on
suitable source for the specialist magnetics.
Figure 5
Output Stage Efficiency v Power with 4and 8loads
ISSUE 3 - NOVEMBER 2003
7
SEMICONDUCTORS

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