PSD211R Family
3.0
Key Features
t Low cost programmable microcontroller peripheral
t 256Kb of UV EPROM with the following features:
• Configurable as 32 K x 8
• Divided into eight equally-sized mappable blocks for optimized address mapping
• As fast as 70 ns access time, which includes address decoding
t 19 I/O pins that can be individually configured for :
• Microcontroller I/O port expansion
• Programmable Address decoder (PAD) I/O
• Latched address output
t Two Programmable Arrays (PAD A and PAD B) replace your discrete PLD or decoder
and have the following features:
• Up to 13 Inputs and 24 outputs
• 36 Product terms (9 for PAD A and 27 for PAD B)
• Ability to decode up to 1 MB of address
t Microcontroller logic that eliminates the need for external “glue logic” has the following
features:
• Ability to interface to multiplexed buses
• Built-in address latches for multiplexed address/data bus
• ALE and Reset polarity are programmable (Reset polarity not programmable
on V-versions)
• Multiple configurations are possible for interface to many different microcontrollers
t Programmable power management with standby current as low as 1µA
(V versions only)
• CMiser bit—programmable option to reduce AC power consumption in memory
• Turbo Bit (ZPSD only)—programmable bit to reduce AC and DC power consumption
in the PADs
t Built-in security locks the device and PAD decoding configuration
t Wide Operating Voltage Range
• V-versions: 2.7 to 5.5 volts
• Others: 4.5 to 5.5 volts
t Available in a variety of packaging (44-pin PLDCC, CLDCC, and PQFP)
t Simple, menu-driven software (PSDsoft) allows configuration and design entry on a PC.
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