XRT83L314IB-L Просмотр технического описания (PDF) - Exar Corporation

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XRT83L314IB-L

14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT

Exar Corporation 

RECEIVER SECTION

NAME

PIN

RLOS

AB1

RCLK13

RCLK12

RCLK11

RCLK10

RCLK9

RCLK8

RCLK7

RCLK6

RCLK5

RCLK4

RCLK3

RCLK2

RCLK1

RCLK0

RPOS13

RPOS12

RPOS11

RPOS10

RPOS9

RPOS8

RPOS7

RPOS6

RPOS5

RPOS4

RPOS3

RPOS2

RPOS1

RPOS0

AB14

Y22

R22

P22

G22

F22

B14

B9

F2

G2

P2

R2

AA2

AA9

Y14

W20

P20

N20

H20

G20

D14

D10

G4

H4

N4

P4

W4

Y10

XRT83L314

14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT

REV. 1.0.0

TYPE

O

O

DESCRIPTION

Receive Loss of Signal (Global Pin for All 14-Channels)

When a receive loss of signal occurs for any one of the 14-channels according

to ITU-T G.775, the RLOS pin will go "High" for a minimum of one RCLK cycle.

RLOS will remain "High" until the loss of signal condition clears. See the

Receive Loss of Signal section of this datasheet for more details.

NOTE: This pin is for redundancy applications to initiate an automatic switch to

the backup card. For individual channel RLOS, see the register map.

Receive Clock Output

RCLK is the recovered clock from the incoming data stream. If the incoming

signal is absent or RxON is pulled "Low", RCLK maintains its timing by using

an internal master clock as its reference. RPOS/RNEG data can be updated

on either edge of RCLK selected by RCLKE in the appropriate global register.

NOTE: RCLKE is a global setting that applies to all 14 channels.

O

RPOS/RDATA Output

Receive digital output pin. In dual rail mode, this pin is the receive positive

data output. In single rail mode, this pin is the receive non-return to zero (NRZ)

data output.

5

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