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XE1202I027 Просмотр технического описания (PDF) - Unspecified

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XE1202I027 Datasheet PDF : 26 Pages
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Data Sheet
XE1202
The threshold fERR = FERR * BR, where BR is the bit rate and FERR is a ratio given in the electrical specifications.
As an example, for a bit rate of 4.8 kb/s and with FERR = 0.5, fERR is 2.4 kHz.
This FEI function works properly only if the input signal is the preamble defined under the Receiver section above
and if the frequency error to be detected is lower than 20 kHz.
The time diagram of an FEI measurement is quite similar to the one of an RSSI measurement, and is given in the
figure below. When the FEI is activated the frequency error is periodically measured and the result is stored in the
register “DataOut_FEI” at each rising edge of DATAIN. TS_FE is the wake-up time required after the function has
been activated to get a valid result.
RTParam_FEI
en
fei_out
XX
VAL1
VAL2
VAL3
VAL4
XX
datain
DataOut_FEI
XX
VAL2
VAL4
TS_FE
Figure 2 FEI measurement time diagram, RTParam_Fsel = 1
4.1.4.2 “RTParam_Fsel” = 0
To activate the FEI function, the bit “RTParam_FEI” must be set to “1”. When activated by the rising edge of
DATAIN, the function provides an 8-bits status stored in register “DataOut_FEI”. The timing diagram of this FEI
measurement is described in the in figure below. The FEI function is activated at the rising edge of the EN signal
when the RTParam_FEI bit is set to “1”. Then, an internal FEI counter is activated at the rising edge of DATAIN.
After duration TS_FE (see Electrical Specifications), the counter is stopped and its content is stored in the register
DataOut_FEI. The maximum delay between the rising edge of DATAIN and the first clock on the internal FEI
counter is 1/(16*BR), where BR is the bit rate.
10
D0211-105

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