FX019DW Просмотр технического описания (PDF) - CML Microsystems Plc

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производитель

FX019DW

Digitally Controlled Quad Amplifier Array

CML Microsystems Plc 

Pin Number

Function

FX019DW

FX019P

1

Serial Clock : This external clock pulse input is used to “clock in” the Control Data. See Figure 4,

Serial Control Data Load Timing. This input has an internal 1MΩ pullup resistor.

2

Load/Latch : Governs the loading and execution of the control data. During serial data loading

this input should be kept at a logical '0' to ensure that data rippling past the latches has no effect.

When all 8 bits have been loaded, this input should be strobed '0' - '1' - '0' to latch the new data in.

Data is executed on the falling edge of the strobe. If the Load/Latch input is used this pin should

be left open circuit. This input has an internal 1MΩ pullup resistor.

3

Load/Latch : The inverted Load/Latch input. This function governs the loading and execution of

the control data. During serial data loading this input should be kept at a logical '1' to ensure that

data rippling past the latches has no effect. When all 8 bits have been loaded, this input should be

strobed '1' - '0' - '1' to latch the new data in. Data is executed on the rising edge of the strobe.

If the Load/Latch input is used this pin should be left open circuit. This input has an internal 1MΩ

pulldown resistor.

4

Ch1 Input :

5

Ch2 Input :

6

Ch3 Input :

7

Ch4 Input :

Analogue Inputs :

These individual amplifier inputs are self-biasing, a.c. input

analogue signals must be capacitively coupled to these pins, as

shown in Figure 2.

Note that amplifiers Ch1 to Ch4 are 'inverting amplifiers.'

8

VSS : Negative supply rail (GND).

9

VBIAS : The output of the on-chip bias circuitry, held at VDD/2. This pin should be decoupled to VSS

as shown in Figure 2.

10

Ch4 Output :

11

Ch3 Output :

12

Ch2 Output :

13

Ch1 Output :

Controlled Analogue Outputs :

The individual "Gain Controlled" amplifier outputs.

Ch1 to Ch3 range from -3dB to +3dB in 0.43dB steps, Ch4 could be

utilized as a volume control, ranging from -14dB to +14dB in 2.0dB

steps.

In the “OFF” mode there is no output from the selected amplifier.

14

Chip Select : A logic input to select one of two FX019 microcircuits in a system, see Table 1.

This input has an internal 1MΩ pulldown resistor.

15

Control Data Input : Operation of the 4 amplifier channels (Ch1 – Ch4) is controlled by the 8 bits

of data entered serially at this pin. The data is entered (bit 7 to bit 0) on the rising edge of the

external Serial Clock. The data format is described in Tables 1, 2 and Figure 4. This input has an

internal 1MΩ pullup resistor.

16

VDD : Positive supply rail. A single +5-volt power supply is required.

2

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