X24C08IS8 Просмотр технического описания (PDF) - Xicor -> Intersil

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производитель

X24C08IS8

Serial E2PROM

Xicor -> Intersil 

X24C08

A.C. CONDITIONS OF TEST

Input Pulse Levels

Input Rise and

Fall Times

I/O Timing Levels

VCC x 0.1 to VCC x 0.9

10ns

VCC x 0.5

3842 PGM T05

EQUIVALENT A.C. LOAD CIRCUIT

5.0V

Output

1533Ω

100pF

3842 FHD F18

A.C. CHARACTERISTICS LIMITS (Over recommended operating conditions, unless otherwise specified.)

Read & Write Cycle Limits

Symbol

Parameter

tSCL

SCL Clock Frequency

tI

Noise Suppression Time Constant at SCL, SDA Inputs

tAA

SCL Low to SDA Data Out Valid

tBUF

Time the Bus Must Be Free Before a

New Transmission Can Start

tHD:STA

tLOW

tHIGH

tSU:STA

tHD:DAT

tSU:DAT

tR

tF

tSU:STO

tDH

Start Condition Hold Time

Clock Low Period

Clock High Period

Start Condition Setup Time

Data In Hold Time

Data In Setup Time

SDA and SCL Rise Time

SDA and SCL Fall Time

Stop Condition Setup Time

Data Out Hold Time

POWER-UP TIMING

Symbol

Parameter

Max.

tPUR(4)

Power-Up to Read Operation

1

tPUW(4)

Power-Up to Write Operation

5

Bus Timing

Min.

0

0.3

4.7

4.0

4.7

4.0

4.7

0

250

4.7

300

Max.

100

100

3.5

Units

KHz

ns

µs

µs

µs

µs

µs

µs

µs

ns

1

µs

300

ns

µs

ns

3842 PGM T06

Units

ms

ms

3842 PGM T07

tF

tHIGH

tLOW

tR

SCL

tSU:STA

tHD:STA tHD:DAT

tSU:DAT

tSU:STO

SDA IN

tAA

tDH

tBUF

SDA OUT

3842 FHD F04

Note: (4) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated. These param-

eters are periodically sampled and not 100% tested.

10

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