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X24C04-2.7 Просмотр технического описания (PDF) - Xicor -> Intersil

Номер в каталоге
Компоненты Описание
производитель
X24C04-2.7
Xicor
Xicor -> Intersil Xicor
X24C04-2.7 Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
X24C04
Bus Timing
SCL
SDA IN
tSU:STA
SDA OUT
tF
tHIGH
tLOW
tHD:STA
tHD:DAT
tSU:DAT
tAA
tDH
tR
tSU:STO
tBUF
Write Cycle Limits
Symbol
tWC(6)
Parameter
Write Cycle Time
Min.
Typ.(5)
5
Max.
10
Unit
ms
Notes: (5) Typical values are for TA = 25°C and nominal supply voltage (5V).
(6) tWR is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum
time the device requires to automatically complete the internal write operation.
The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal erase/write
cycle. During the write cycle, the X24C04 bus interface circuits are disabled, SDA is allowed to remain HIGH, and
the device does not respond to its slave address.
Write Cycle Timing
SCL
SDA
8th Bit
Word n
ACK
STOP
Condition
tWC
X24C04 Address
START
Condition
REV 1.1.3 11/28/00
www.xicor.com
Characteristics subject to change without notice. 10 of 13

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