X24042P Просмотр технического описания (PDF) - Xicor -> Intersil
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X24042P Datasheet PDF : 15 Pages
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X24042
WRITE CYCLE LIMITS
Symbol
tWR(6)
Parameter
Write Cycle Time
Min.
Typ.(5)
5
Max.
10
Units
ms
3849 PGM T09
The write cycle time is the time from a valid stop
condition of a write sequence to the end of the internal
erase/program cycle. During the write cycle, the X24042
bus interface circuits are disabled, SDA is allowed to
remain high, and the device does not respond to its slave
address.
Write Cycle Timing
SCL
SDA
8th BIT
WORD n
ACK
STOP
CONDITION
tWR
START
CONDITION
X24042
ADDRESS
3849 FHD F05
Notes: (5) Typical values are for TA = 25°C and nominal supply voltage (5V).
(6) tWR is the minimum cycle time from the system perspective when polling techniques are not used. It is the maximum time the
device requires to perform the internal write operation.
Guidelines for Calculating Typical Values of Bus
Pull-Up Resistors
120
100
RMIN
=
VCC MAX
IOL MIN
=1.8KΩ
80
RMAX
=tRMAX
CBUS
60
MAX.
RESISTANCE
40
20 MIN.
RESISTANCE
0
0 20 40 60
80 100 120
BUS CAPACITANCE (pF)
3849 FHD F17
SYMBOL TABLE
WAVEFORM
INPUTS
Must be
steady
May change
from Low to
High
May change
from High to
Low
Don’t Care:
Changes
Allowed
N/A
OUTPUTS
Will be
steady
Will change
from Low to
High
Will change
from High to
Low
Changing:
State Not
Known
Center Line
is High
Impedance
11
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