X24026 Просмотр технического описания (PDF) - Xicor -> Intersil
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X24026 Datasheet PDF : 15 Pages
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X24026
WRITE CYCLE LIMITS
Symbol
Parameter
Min.
Typ.(5)
Max.
Units
tWR(6)
Write Cycle Time
5
10
ms
7020 FRM T08
The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal erase/program
cycle. During the write cycle, the X24026 bus interface circuits are disabled, SDA is allowed to remain high, and the
device does not respond to its slave address.
Write Cycle Timing
SCL
SDA
8th BIT
ACK
WORD n
tWR
STOP
CONDITION
START
CONDITION
X24026
ADDRESS
7020 FRM 15
Notes: (5) Typical values are for TA = 25°C and nominal supply voltage (5V)
(6) tWR is the minimum cycle time from the system perspective when polling techniques are not used. It is the maximum time the device
requires to perform the internal write operation.
Guidelines for Calculating Typical Values of Bus
Pull-Up Resistors
120
100
80
60
40
RMIN
= VCC MAX
IOL MIN
tR
RMAX
=
CBUS
MAX.
RESISTANCE
=1.8KΩ
20 MIN.
RESISTANCE
0
0 20 40 60
80 100 120
BUS CAPACITANCE (pF)
7020 FRM 16
SYMBOL TABLE
WAVEFORM INPUTS
OUTPUTS
Must be
steady
May change
from Low to
High
May change
from High to
Low
Don’t Care:
Changes
Allowed
N/A
Will be
steady
Will change
from Low to
High
Will change
from High to
Low
Changing:
State Not
Known
Center Line
is High
Impedance
11
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