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WM8773IFT Просмотр технического описания (PDF) - Wolfson Microelectronics plc

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Компоненты Описание
производитель
WM8773IFT
Wolfson
Wolfson Microelectronics plc Wolfson
WM8773IFT Datasheet PDF : 29 Pages
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WM8773
BCLK
ADCLRC
DOUT
tBCH
tBCL
tBCY
tDD
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Figure 5 Digital Audio Data Timing Slave Mode
Test Conditions
AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, TA = +25oC, Slave Mode, fs = 48kHz, MCLK = 256fs unless otherwise
stated.
PARAMETER
SYMBOL
Audio Data Input Timing Information
BCLK cycle time
tBCY
BCLK pulse width high
tBCH
BCLK pulse width low
tBCL
DOUT propagation delay
tDD
from BCLK falling edge
Table 3 Digital Audio Data Timing Slave Mode
TEST CONDITIONS
MIN
TYP
MAX
UNIT
50
ns
20
ns
20
ns
0
10
ns
Note:
1. ADCLRC should be synchronous with MCLK, although the WM8773 interface is tolerant of phase variations or jitter on
these signals.
PP Rev 1.0 June 2002
10

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