WM8740EDS Просмотр технического описания (PDF) - Wolfson Microelectronics plc
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WM8740EDS Datasheet PDF : 24 Pages
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WM8740
Production Data
Test Conditions
AVDD, DVDD = 5V, AGND, DGND = 0V, TA = +25oC, fs = 48kHz, SCKI = 256fs unless otherwise stated.
PARAMETER
Analogue Output Levels
Output level differential
Minimum resistance load
Maximum capacitance load
Output DC level
Reference Levels
Potential divider resistance
SYMBOL
TEST CONDITIONS
Into 10kΩ, full scale 0dB,
(5V supply)
Into 10kΩ, full scale 0dB,
(3.3V supply)
To midrail or AC coupled
(5V supply)
To midrail or AC coupled
(3.3V supply)
5V or 3.3V
AVDD to VMIDL/VMIDR and
VMIDL/VMIDR to AGND
MIN
TYP
MAX
UNIT
2
1.32
1
600
VRMS
VRMS
kΩ
Ω
100
pF
AVDD/2
V
10
kΩ
Voltage at VMIDL/VMIDR
AVDD/2
POR (Power-On Reset)
POR threshold
2.2
V
Notes: 1. Ratio of output level with 1kHz full scale input, to the output level with all zeros into the digital input, measured ‘A’
weighted over a 20Hz to 20kHz bandwidth.
2. All performance measurements done with 20kHz low pass filter. Failure to use such a filter will result in higher
THD+N and lower SNR and Dynamic Range readings than are found in the Electrical Characteristics. The low
pass filter removes out of band noise; although it is not audible it may affect dynamic specification values.
LRCIN
BCKIN
DIN
tBCH
tBCL
tLB
tBCY
tBL
tDS
tDH
Figure 1 Audio Data Input Timing
Test Conditions
AVDD, DVDD = 5V, AGND, DGND = 0V, TA = +25oC, fs = 48kHz, SCKI = 256fs unless otherwise stated.
PARAMETER
SYMBOL
Audio Data Input Timing Information
BCKIN pulse cycle time
tBCY
BCKIN pulse width high
tBCH
BCKIN pulse width low
tBCL
BCKIN rising edge to
tBL
LRCIN edge
LRCIN rising edge to
tLB
BCKIN rising edge
DIN setup time
tDS
DIN hold time
tDH
TEST CONDITIONS
MIN
TYP
100
40
40
20
20
20
20
MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
w
PD Rev 4.0 April 2004
7
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