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W77E516 Просмотр технического описания (PDF) - Winbond

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Компоненты Описание
производитель
W77E516
Winbond
Winbond Winbond
W77E516 Datasheet PDF : 85 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
Preliminary W77E516
Serial Data Buffer
Bit:
7
6
5
4
3
2
1
0
SBUF.7 SBUF.6 SBUF.5 SBUF.4 SBUF.3 SBUF.2 SBUF.1 SBUF.0
Mnemonic: SBUF
Address: 99h
SBUF.7 0: Serial data on the serial port 0 is read from or written to this location. It actually
consists of two separate internal 8-bit registers. One is the receive resister, and the
other is the transmit buffer. Any read access gets data from the receive data buffer,
while write access is to the transmit data buffer.
P4.2 Base Address Low Byte Register
Bit:
7
6
5
4
3
2
1
0
A7
A6
A5
A4
A3
A2
A1
A0
Mnemonic: P42AL
Address: 9Ah
P4.2 Base Address High Byte Register
Bit:
7
6
5
4
3
2
1
0
A15 A14 A13 A12 A11 A10
A9
A8
Mnemonic: P42AH
Address: 9Bh
P4.3 Base Address Low Byte Register
Bit:
7
6
5
4
3
2
1
0
A7
A6
A5
A4
A3
A2
A1
A0
Mnemonic: P43AL
Address: 9Ch
P4.3 Base Address High Byte Register
Bit:
7
6
5
4
3
2
1
0
A15 A14 A13 A12 A11 A10
A9
A8
Mnemonic: P43AH
Address: 9Dh
ISP Control Register
Bit:
7
6
5
4
3
2
1
0
SWRST/HWB - LDAP
-
-
- LDSEL ENP
Mnemonic: CHPCON
Address: 9Fh
SWRST/HWB: Set this bit to launch a whole device reset that is same as asserting high to RST pin,
micro controller will be back to initial state and clear this bit automatically. To read
this bit, its alternate function to indicate the ISP hardware reboot mode is invoking
when read it in high.
- 20 -

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