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VSC8201DL

SimpliPHY® VSC8201 PCB Design and Layout Guide Single Port 10/100/1000BASE-Tand 1000BASE-X PHY

Vitesse Semiconductor 

VSC8201DL

MAC Transmit and Receive Interface Pins

These signals on these pins have rise/fall times of about 0.7 to 1 ns. To adequately accommodate these signals on a PCB, it is recom-

mended that the traces be designed as either a microstrip or stripline transmission lines with a characteristic impedance of 50 Ω . It is

also important that an unbroken ground plane exist above and/or below these signals.

For the MAC transmit interface, if the output resistance of the corresponding pins on the MAC side is less than 50 Ω , additional series

termination resistor should be placed close to the MAC device.

For the VSC8201 MAC receive interface, each pin is self-calibrating to an output resistance of 50 Ω . Thus, external series termination

resistors are not required as long as the characteristic impedance of the trace is 50 Ω .

As shown in the previous section, for a rise time of 0.7 ns, the minimum length of a microstrip for it to be considered a transmission line

is 0.827 inches (for standard FR4 material with dielectric constant of 4.4). Hence above mentioned series termination considerations are

important only if the microstrip length is greater than 0.827 inches.

For most cases the MAC can be placed close to the PHY’s MAC interface pins.

Twisted-Pair Interface pins

As the interface to external CAT-5 cable, these pins are organized in four differential pairs for each port.These are labelled “TXIP_x” and

“TXIN_x”, where ‘x’ is the particular pair within a single cable. When routing these pairs on a PCB, they must be routed using transmis-

sion lines with a characteristic impedance of 50 Ω , and the traces for each differential pair must be routed symmetrically as close to each

other as possible. By keeping the differential pairs together on the board, the result is the required 100-ohm differential impedance for

each twisted pair.

Other Impedance Controlled pins

The following signals have 50 ohm integrated series termination resistors and therefore should be routed using 50 Ω transmission lines:

• ADDR(0)/LINK10

• ADDR(1)/LINK100

• ADDR(2)/LINK1000

• ADDR(3)/DUPLEX

• ADDR(4)/ACTIVITY

• MODE10

• MODE100

• MODE1000

• TDO

• OSC_EN/CLK125

• REG_EN/QUALITY

• MDIO

Other Board Layout Considerations

• Place the RJ-45, transformer and the PHY device as close as possible to each other.

• All traces that run from the transformer to the RJ-45 should be matched in length and be as short as possible.

• Keep a continuous ground plane underneath the high speed MAC Tx/Rx data signal traces. These traces should be of equal length

and be as short as possible.

Rev. 1.6.3 - 9/29/04

VITESSE - CONFIDENTIAL & PROPRIETARY - DO NOT COPY WITHOUT PERMISSION

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