VP2614CGGPFR Просмотр технического описания (PDF) - Mitel Networks
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VP2614CGGPFR Datasheet PDF : 12 Pages
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VP2614
PIN DESCRIPTION
SIG
TYPE
FUNCTION
LD
I
LEN
I
LCLK
I
LRED
O
DBUS7:0 O
DMODE3:0 O
PM2:0
O
DCLK
O
SCLK
I
HD7:0
I/O
HA3:0
I
WR
I
RD
I
CEN
I
ERR
O
EVT
O
B7:0
I/O
A14:0
O
WS
O
BCS
O
BEN
O
TCK
I
TMS
I
TDI
I
TDO
O
TRST
I
TOE
I
RES
I
Line input data
When low, the line input data is valid.
Line input strobe
When low, line data cannot be ac
cepted.
Data and control bus to the VP2615.
These outputs identify the data on
DBUS7:0.
Identifiers for the additional information
on DBUS7:0 .Not used by the VP2615.
Continuous O/P strobe for the DBUS7:0
bus which is derived from SCLK.
System clock. Must be 27 MHz for 30 Hz
frame rates.
Bi-directional data bus.
Four system controller address bits.
An active low write strobe from the
system controller.
An active low read strobe from the
system controller.
An active low chip select from the sys
tem controller.
An active low output which Indicates
framing and decoding errors.
An active low output which Indicates
that new picture status data is available.
Bi-directional data bus to the receive
buffer.
Address bus to the receive buffer.
An active low write strobe for the receive
buffer.
An active low select for the receive
buffer.
An active low output enable for the
buffer.
JTAG test clock
JTAG mode select
JTAG I/P data
JTAG O/P data
JTAG reset
When low all outputs are high imped-
ance
An active low power on reset
NOTE:
"Barred" active low signals do not appear with a bar in the
main body of the text.
OPERATION OF THE MAJOR BLOCKS
FRAME ALIGNMENT
The H.261 continuous bitstream is split into frames of 512
bits the first bit in each frame being part of an 8 bit frame
alignment pattern. Only the sequence in the pattern is impor-
tant and detection can start from any bit. To avoid false
detection within the actual data, this pattern must be repeated
at least three times before " frame lock " can be considered to
have been achieved.
The detection of frame lock thus requires data from 24
consecutive 512 bit frames, and a section of the Received
Data Buffer is reserved for this purpose. This external RAM is
supported by a small internal buffer which allows eight con-
secutive bits ( obtained from reading a byte ) to be simultane-
ously checked for alignment with the corresponding bits in
seven other bytes spaced apart by complete frames. The
search for alignment over 512 bits takes less than 250
microseconds with a 27 MHz clock, this being less than the
time taken to receive 512 bits at the maximum rate of 2Mb/
second. Thus the buffer area for frame lock does not overflow.
Once frame lock has been achieved it is continually
monitored using the appropriate bit in each frame. If a mis-
match occurs then the next four frame alignment bits will be
checked for errors. If any one of these four bits is also in error
then loss of frame alignment is declared by setting a Status
Register Bit, and a search for a new alignment position will
commence. If none are in error then a random bit error is
assumed and no further action is taken.
The check done on loss of alignment is a compromise
between falsely believing that alignment has been lost and not
detecting that frame alignment has been lost. The probability
of two random bit errors in the five frames used in the check
is dependent on the bit rate and also the error rate. With a high
error rate of 1:100000, and a bit rate of 2Mb/sec, false
detection is possible once per week. The probability of detect-
ing a change in the frame alignment ( caused by switching in
a new bitstream ) is 46.9% in the first five frames, but this rises
to 97.4% after 12 frames have been processed.
Control Bits allow H261 framing to be either identified or
ignored. In the latter case Frame Lock will always be indicated
and data is still buffered and processed. The datastream is
then expected to contain pure data and a search will be made
to find picture start codes. When framing is enabled the 18
parity bits are extracted from the data, but single bits in error
can still go un-detected in some circumstances.
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