V386GLF Просмотр технического описания (PDF) - Integrated Circuit Systems
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V386GLF Datasheet PDF : 10 Pages
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V386
8-BIT LVDS RECEIVER FOR VIDEO
Timing Diagrams
CLKIN/CLKOUT
ODD Data In/Data Out
EVEN Data In/Data Out
T
Figure 1a. “Worst Case” Test Pattern
CLKOUT
D0, 8, 16
D1, 9, 17
D2, 10, 18
D3, 11, 19
D4-7, 12-15, 20-23
D24-27
Figure 1b. 16-Grayscale Test-Pattern Waveforms
CMOS/TTL Output
8pF
80%
80%
20%
CLHT
V386 CMO/TTL Output Load and Transition Times
Figure 2. V386 CMOS/TTL Output Load and Transition Time
20%
CHLT
V386 Datasheet
7
5/25/05
Revision 2.0
Integrated Circuit Systems • 525 Race Street, San Jose, CA 95126 • tel (408) 297-1201 • www.icst.com
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