V385A Просмотр технического описания (PDF) - Integrated Circuit Systems
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V385A Datasheet PDF : 8 Pages
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V385A
8-BIT LVDS TRANSMITTER FOR VIDEO
AC Timing Diagrams
~3.3V
TxCLKIN
~0V
~3.3V
TxIN[27:0]
~0V
1.5V
0.8V
TCIH
2.0V
TSTC
2.0V
0.8V
TCIP
TCIL
THTC
Data is sampled on the falling edge of clock (pin R_FB = 0)
Figure AC1. Transmitter Setup/Hold and High/Low Times (Falling Edge Strobe or R_FB=0)
TxCLK IN
TxCLK OUT+
TCCD
TxCLK OUT-
Figure AC2. Clock IN to Clock OUT Delay (Rising Edge Strobe or R_FB=1)
PWRDWN#
VCC
TxCLK IN
Figure AC3. Phase Lock Loop Set Time
TPLLS
Unknown
V385A Datasheet
6
11/23/05
Revision 0.1
Integrated Circuit Systems • 525 Race Street, San Jose, CA 95126 • tel (408) 297-1201 • www.icst.com
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