USB1T1102R Просмотр технического описания (PDF) - Fairchild Semiconductor
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производитель
USB1T1102R Datasheet PDF : 14 Pages
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Connection Diagrams
MLP16 GND Exposed Diepad
MLP14 GND Exposed Diepad
(Bottom View)
(Bottom View)
Terminal Descriptions
Terminal Number
MLP14 MLP16
1
1
Terminal
Name
OE
2
2
RCV
3
3
Vp/Vpo
4
4
Vm/Vmo
5
5
SUSPND
—
6
NC
6
7
VCCIO
7
8
Vbusmon
9, 8
10, 9
D+, D−
10
11
NC
—
12
NC
11
13 VREG (3.3V)
12
14 VCC (5.0V)
I/O
I
O
I/O
I/O
I
O
AI/O
Terminal Description
Output Enable:
Active LOW enables the transceiver to transmit data on the bus. When not
active the transceiver is in the receive mode (CMOS level is relative to VCCIO)
Receive Data Output:
Non-inverted CMOS level output for USB differential Input (CMOS output level
is relative to VCCIO). Driven LOW when SUSPN is HIGH; RCV output is stable
and preserved during SE0 condition.
Single-ended D+ receiver output VP (CMOS level relative to VCCIO):
Used for external detection of SE0, error conditions, speed of connected device;
Pin also acts as drive data input Vpo (see Table 1 and Table 2).
Output drive is 4 mA buffer.
Single-ended D− receiver output Vm (CMOS level relative to VCCIO):
Used for external detection of SE0, error conditions, speed of connected device;
Pin also acts as drive data input Vmo (see Table 1 and Table 2).
Output drive is 4 mA buffer.
Suspend:
Enables a low power state (CMOS level is relative to VCCIO). While the
SUSPND pin is active (HIGH) it will drive the RCV pin to logic “0” state.
No Connect
Supply Voltage for digital I/O pins (1.65V to 3.6V):
When not connected the D+ and D− pins are in 3-STATE. This supply bus is
totally independent of VCC (5V) and VREG (3.3V).
Vbus monitor output (CMOS level relative to VCCIO):
When Vbus > 4.1V then Vbusmon = HIGH and when Vbus < 3.6V then
Vbusmon = LOW. If SUSPND = HIGH then Vbusmon is pulled HIGH.
Data +, Data −:
Differential data bus conforming to the USB standard.
No Connect
No Connect
Internal Regulator Option:
Regulated supply output voltage (3.0V to 3.6V) during 5V operation;
decoupling capacitor of at least 0.1 µF is required.
Regulator ByPass Option:
Used as supply voltage input for 3.3V operation.
Internal Regulator Option:
Used as supply voltage input (4.0V to 5.5V); can be connected directly to USB
line Vbus.
Regulator ByPass Option:
Connected to VREG (3.3V)
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