UPD77112GC Просмотр технического описания (PDF) - NEC => Renesas Technology

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UPD77112GC

16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSORS

NEC => Renesas Technology 

µPD77110, 77111, 77112

7.1.2 Interrupt vector table

Addresses 0x200 through 0x23F of the instruction memory are entry points (vectors) of interrupts.

instruction addresses are assigned to each interrupt source.

Four

Vector

0x200

0x204

0x208

0x20C

0x210

0x214

0x218

0x21C

0x220

0x224

0x228

0x22C

0x230

0x234

0x238

0x23C

Interrupt Source

Reset

Reserved

INT1

INT2

INT3

INT4

SI1 input

SO1 output

SI2 input

SO2 output

HI input

HO output

Reserved

Cautions

1. Although reset is not an interrupt, it is handled like an interrupt as an entry to a vector.

2. It is recommended that unused interrupt source vectors be used to branch an error

processing routine.

3. Because a vector area also exists in the internal RAM area of the mask ROM model, this

area must be booted up. In addition, because the entry address after reset is 0x200,

address 0x200 must be booted up even when the internal instruction RAM and interrupts are

not used.

28

Data Sheet U12801EJ4V0DS00

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