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UPD753204 Просмотр технического описания (PDF) - NEC => Renesas Technology

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Компоненты Описание
производитель
UPD753204
NEC
NEC => Renesas Technology NEC
UPD753204 Datasheet PDF : 80 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
µPD753204, 753206, 753208
1. PIN CONFIGURATION (TOP VIEW)
48-pin plastic shrink SOP (375 mils, 0.65-mm pitch)
µPD753204GT-×××, µPD753206GT-×××,
µPD753208GT-×××
COM0
1
COM1
2
COM2
3
COM3
4
BIAS
5
VLC0
6
VLC1
7
VLC2
8
P30/LCDCL
9
P31/SYNC
10
P32
11
P33
12
VSS
13
P50
14
P51
15
P52
16
P53
17
P60/KR0
18
P61/KR1
19
P62/KR2
20
P63/KR3
21
VDD
22
X1
23
X2
24
48
S12
47
S13
46
S14
45
S15
44
P93/S16
43
P92/S17
42
P91/S18
41
P90/S19
40
P83/S20
39
P82/S21
38
P81/S22
37
P80/S23
36
P23/BUZ
35
P22/PCL/PTO2
34
P21/PTO1
33
P20/PTO0
32
P13/TI0
31
P10/INT0
30
P03/SI/SB1
29
P02/SO/SB0
28
P01/SCK
27
P00/INT4
26
RESET
25
IC Note
Note Connect IC (Internally Connected) pin directly to VDD.
Pin Identification
P00 to P03
: Port0
P10, P13
: Port1
P20 to P23
: Port2
P30 to P33
: Port3
P50 to P53
: Port5
P60 to P63
: Port6
P80 to P83
: Port8
P90 to P93
: Port9
KR0 to KR3 : Key Return 0 to 3
COM0 to COM3 : Common Output 0 to 3
SCK
: Serial Clock
SI
: Serial Input
SO
: Serial Output
SB0, SB1
: Serial Data Bus 0, 1
S12 to S23 : Segment Output 12 to 23
VLC0 to VLC2 : LCD Power Supply 0 to 2
BIAS
: LCD Power Supply Bias Control
LCDCL
: LCD Clock
SYNC
: LCD Synchronization
TI0
: Timer Input 0
PTO0 to PTO2 : Programmable Timer Output 0 to 2
BUZ
: Buzzer Clock
PCL
: Programmable Clock
INT0, INT4 : External Vectored Interrupt 0, 4
X1, X2
: System Clock Oscillation 1, 2
RESET
: Reset
IC
: Internally Connected
VDD
: Positive Power Supply
VSS
: Ground
5

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