UPD75236GJ Просмотр технического описания (PDF) - NEC => Renesas Technology
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UPD75236GJ Datasheet PDF : 190 Pages
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µPD75236
Table 2-1 Addressing Modes
Addressing Mode
Identifier
1-bit direct addressing mem.bit
4-bit direct addressing
mem
8-bit direct addressing
@HL
4-bit register indirect
addressing
@HL+ @HL–
@DE
@DL
8-bit register indirect
addressing
@HL
fmem.bit
Bit manipulation
addressing
pmem.@L
Stack addressing
@H + mem.bit
Address Specified
Bit indicated by bit of address indicated by MB and mem, where :
MBE = 0
When mem = 00H to 7FH, MB = 0
When mem = 80H to FFH, MB = 15
MBE = 1
MB = MBS
Address indicated by MB and mem, where :
MBE = 0
When mem = 00H to 7FH, MB = 0
When mem = 80H to FFH, MB = 15
MBE = 1
MB = MBS
Address indicated by MB and mem (mem is an even address), where:
MBE = 0
When mem = 00H to 7FH, MB = 0
When mem = 80H to FFH, MB = 15
MBE = 1
MB = MBS
Address indicated by MB and HL, where : MB = MBE• MBS
Address indicated by MB and HL, where : MB = MBE• MBS
HL+ automatically increments L register after addressing.
HL– automatically decrements L register after addressing.
Address indicated by DE of memory bank 0
Address indicated by DL of memory bank 0
Address indicated by MB and HL, where : MB = MBE• MBS
Bit 0 of L register is ignored.
Bit indicated by bit of address indicated by fmem, where:
fmem =
FB0H to FBFH (interrupt-related hardware)
FF0H to FFFH (I/O port)
Bit indicated by the lower 2 bits of L register of the address indicated by the
higher 10 bits of pmem and the higher 2 bits of L register, where:
pmem = FC0H to FFFH
Bit indicated by bit of the address indicated by MB, H and the lower 4 bits of mem,
where: MB = MBE• MBS
Address indicated by SP of memory banks 0, 1 and 2 selected by SBS
As described in Table 2-1, direct and indirect addressing is possible for each of 1-bit, 4-bit and 8-bit data in
µPD75236 data memory manipulation. Thus, easy-to-understand programs can be created very efficiently.
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