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UPD75236GJ Просмотр технического описания (PDF) - NEC => Renesas Technology

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Компоненты Описание
производитель
UPD75236GJ
NEC
NEC => Renesas Technology NEC
UPD75236GJ Datasheet PDF : 190 Pages
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µPD75236
9. MASK OPTION SELECTION
The µPD75236 has the following mask options enabling or disabling on-chip components.
Pin
P40 to P43
P50 to P53
P70 to P73
S0/P120 to S3/P123
S4/P130 to S7/P133
S8/P140, S9/P141
S10/T15/P142, S11/T14/P143
S12/T13/P150/PH0 to S15/T10/P153/PH3
S16/P100 to S19/P103
S20/P110 to S23/P113
XT1, XT2
Mask Option
Pull-up resistor incorporation enabled bit-wise
Pull-down resistor incorporation enabled bit-wise
Pull-down resistor incorporation to VLOAD enabled bit-wise
Pull-down resistor incorporation to VLOAD or VSS bit-wise *
Deletion of sybsystem clock oscillator feedback
resistor possible
* Select pull-down resistor incorporation to VLOAD or VSS in 8-bit units.
Note In a system not using subsystem clocks, power consumption in the STOP mode can be decreased by
removing the feedback resistor from the oscillator.
168

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