UPD75236GJ Просмотр технического описания (PDF) - NEC => Renesas Technology

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UPD75236GJ

4-BIT SINGLE-CHIP MICROCOMPUTER

NEC => Renesas Technology 

µPD75236

(2) Operation codes of bit manipulation addressing

*1 in the operand column indicates that the following three addressings are available.

• fmem.bit

• pmem.@L

• @H+mem.bit

The 2nd byte *2 of the operation code corresponding to the above addressing is shown below:

*1

fmem.bit

pmem.@L

@H+mem.bit

2nd Byte of Operation Code

1 0 B1 B0 F3 F2 F1 F0

1 1 B1 B0 F3 F2 F1 F0

0 1 0 0 G3 G2 G1 G0

0 0 B1 B0 D3 D2 D1 D0

Accessible Bits

Manipulatable bits of FB0H to FBFH

Manipulatable bits of FF0H to FFFH

Manipulatable bits of FC0H to FFFH

Manipulatable bits of accessible

memory banks

Bn :

Fn :

Gn :

Dn :

Immediate data for bit

Immediate data for fmem (indicating the low-order 4-bits of address)

Immediate data for pmem (indicating the bits 5 to 2 of address)

Immediate data for mem (indicating the low-order 4 bits of address)

163

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