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UPD3725AD Просмотр технического описания (PDF) - NEC => Renesas Technology

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Компоненты Описание
производитель
UPD3725AD
NEC
NEC => Renesas Technology NEC
UPD3725AD Datasheet PDF : 22 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
TIMING CHART 1
R, B
φTG1, φTG3
G
φTG2
φ1A1 to φ1A4, φ1L
φ 2A1 to φ2A4, φ 2L
φR1B
φR2B
VOUT1, 3, 5
VOUT2, 4, 6
0
1
2
3
13
60
61
62
63
64
65
66
D0 D2 D4 D8
D26
D1 D3 D5
D25 D27
D122
D126 S1 S3 S5
D123
D127 S2
S4
S6
Vacant transfer (26 bits)
Optical black (96 bits) Invalid photocell (6 bits) Valid photocell (5000 bits)
Caution Pins 18 (φ1A1) and 15 (φ1A2), 11 (φ1A3) and 8 (φ1A4) are each connected inside of the device, so do not input different timings to them.
And also pins 17 (φ2A1) and 14 (φ2A2), 12 (φ2A3) and 9 (φ2A4) are each connected inside of the device, so do not input different timings to them
(refer to BLOCK DIAGRAM).

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