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UPD17P401CG-XXX-3B9 Просмотр технического описания (PDF) - NEC => Renesas Technology

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UPD17P401CG-XXX-3B9 Datasheet PDF : 32 Pages
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µPD17P401
PIN NO.
31
32
33
34
35
36
37
38
39
SYMBOL
VSYNC
HSYNC
GND
OSCIN
OSCOUT
VDD1
XIN
XOUT
CE
FUNCTION
Inputs the IDC (Image Display Controller)
vertical synchronization signal.
Controls timing for output of the IDC
character display signal and blanking
signal. Should be made an active-low
input. Either the rising edge or falling
edge may be selected as the valid edge for
an interrupt request.
Inputs the IDC (Image Display Controller)
horizontal synchronization signal. Controls
timing for output of the IDC character
display signal and blanking signal.
Should be made an active-low input.
Pins for ground.
Pins 33 and 53 are connected within the
chip, but should also be connected to the
same potential externally taking into
consideration the characteristics of the IDC
(Image Display Controller).
Connect the IDC (Image Display Controller)
LC oscillator. This oscillation frequency is
used to generate the character display
signal. The oscillator is stopped when CE
is low.
Positive power supply.
Applies 5 V ±10 % in normal operation
mode.
Connect the system clock oscillator.
A 10 MHz crystal resonator or ceramic
resonator should be connected.
µPD17P401 operation selection signal and
reset signal input
OUTPUT TYPE
CMOS push-pull
CMOS push-pull
AFTER POWER-ON
RESET
Input
Input
Input
8

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