UPD17P133GT Просмотр технического описания (PDF) - NEC => Renesas Technology

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UPD17P133GT

4-BIT SINGLE-CHIP MICROCONTROLLER

NEC => Renesas Technology 

5.1.5 General Data Memory ......................................................................................................... 33

5.1.6 Uninstalled Data Memory ................................................................................................... 33

CHAPTER 6 STACK ........................................................................................................................ 35

6.1 STACK CONFIGURATION ................................................................................................ 35

6.2 FUNCTIONS OF THE STACK ........................................................................................... 35

6.3 ADDRESS STACK REGISTER .......................................................................................... 36

6.4 INTERRUPT STACK REGISTER ....................................................................................... 36

6.5 STACK POINTER (SP) AND INTERRUPT STACK REGISTER ....................................... 36

6.6 STACK OPERATION DURING SUBROUTINES, TABLE REFERENCES,

AND INTERRUPTS ............................................................................................................ 37

6.6.1 Stack Operation during Subroutine Calls (CALL) and Returns (RET, RETSK) .................. 37

6.6.2 Stack Operation during Table Reference (MOVT DBF, @AR) ........................................... 38

6.6.3 Executing RETI Instruction .................................................................................................. 39

6.7 STACK NESTING LEVELS AND THE PUSH AND POP INSTRUCTIONS ................... 39

CHAPTER 7 SYSTEM REGISTER (SYSREG) ................................................................................. 41

7.1 SYSTEM REGISTER CONFIGURATION .......................................................................... 41

7.2 ADDRESS REGISTER (AR) ............................................................................................... 43

7.2.1 Address Register Configuration .......................................................................................... 43

7.2.2 Address Register Functions ................................................................................................ 43

7.3 WINDOW REGISTER (WR) ............................................................................................... 45

7.3.1 Window Register Configuration .......................................................................................... 45

7.3.2 Window Register Functions ................................................................................................ 45

7.4 BANK REGISTER (BANK) ................................................................................................. 46

7.5 INDEX REGISTER (IX) AND DATA MEMORY ROW ADDRESS POINTER

(Memory Pointer: MP) .................................................................................................... 47

7.5.1 Index Register (IX) ............................................................................................................... 47

7.5.2 Data Memory Row Address Pointer (Memory Pointer: MP) ........................................... 47

7.5.3 MPE=0 and IXE=0 (No Data Memory Modification) ......................................................... 50

7.5.4 MPE=1 and IXE=0 (Diagonal Indirect Data Transfer) ........................................................ 52

7.5.5 MPE=0 and IXE=1 (Index Modification) ............................................................................. 54

7.6 GENERAL REGISTER POINTER (RP) .............................................................................. 59

7.6.1 General Register Pointer Configuration .............................................................................. 59

7.6.2 Functions of the General Register Pointer ......................................................................... 60

7.7 PROGRAM STATUS WORD (PSWORD) ........................................................................ 61

7.7.1 Program Status Word Configuration .................................................................................. 61

7.7.2 Functions of the Program Status Word ............................................................................. 62

7.7.3 Index Enable Flag (IXE) ....................................................................................................... 63

7.7.4 Zero Flag (Z) and Compare Flag (CMP) .............................................................................. 63

7.7.5 Carry Flag (CY) ..................................................................................................................... 64

7.7.6 Binary-Coded Decimal Flag (BCD) ...................................................................................... 64

7.7.7 Caution on Use of Arithmetic Operations on the Program Status Word ......................... 64

7.8 CAUTIONS ON USE OF THE SYSTEM REGISTER ....................................................... 65

7.8.1 Reserved Words for Use with the System Register ......................................................... 65

7.8.2 Handling of System Register Addresses Fixed at 0 .......................................................... 67

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