UPC8110GR Просмотр технического описания (PDF) - NEC => Renesas Technology
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производитель
UPC8110GR
NEC => Renesas Technology
UPC8110GR Datasheet PDF : 28 Pages
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µPC8110GR
PIN EXPLANATION
Pin
SUPPLY PIN
No. ASSIGNMENT VOL. (V) VOL. (V) FUNCTION AND APPLICATION
EQUIVALENT CIRCUIT
1
LOin
2.6
LO input for phase shifter.
Connect around 50 Ω between 1
and 3 pin to match to 50 Ω.
2
GND
(for Local
0
Connect to the ground with
minimum inductance.
1
18
Amp. Block)
Track length should be kept as
short as possible.
3
3
LOin
2.6
Bypass of LO input.
This pin is grounded through
around 33 pF capacitor.
5
Q
VCC/2
Input for Q signal.
This input impedance is 150 kΩ.
In case of that I/Q input signals
are single ended, amplitude of
the signal is 500 mVp-p max.
Note 2
6
Q
VCC/2
Input for Q signal.
5
6
This input impedance is 150 kΩ.
In case of that I/Q input signals
are single ended, VCC/2 biased
DC signal should be input.
In case of that I/Q input signals
are differential, amplitude of the
signal is 250 mVp-p max. Note 2
7
I
VCC/2
Input for I signal.
This input impedance is 150 kΩ.
In case of that I/Q input signals
are single ended, VCC/2 biased
DC signal should be input.
In case of that I/Q input signals
are differential, amplitude of the
8
7
signal is 250 mVp-p max. Note 2
8
I
VCC/2
Input for I signal.
This input impedance is 150 kΩ.
In case of that I/Q input signals
are single ended, amplitude of
the signal is 500 mVp-p max.
Note 2
9
GND
0
Connect to the ground with
(for Quadrature
minimum inductance.
13 Modulator Block)
Track length should be kept as
16
short as possible.
Data Sheet P11074EJ3V0DS00
5
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