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UPC2533GS Просмотр технического описания (PDF) - NEC => Renesas Technology

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производитель
UPC2533GS
NEC
NEC => Renesas Technology NEC
UPC2533GS Datasheet PDF : 36 Pages
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µPC2533
2.3 MIX2 Block
Fig. 2-3 MIX2 Block
From 10.7 MHz BPF
VCC
Note
Xtal
+
To IF amplifier
28
23 17 24
25
14 13
12 11 22
21
R211
Current control
circuit
R212
Bias
circuit
R210
Q201
Q202
Q205
Q206
Q204
Q203
Q208
Q207
Q203
OSC2
Buff2
Note
R209
R207
R208
To RF AGC circuit (Fig. 2-4)
From IF AGC (Fig. 2-6)
Note Output impedance and input impedance of Buff2 are 2 kand 30 k, respectively.
MIX2 (Q201 to Q208) is a DBM with a configuration similar to that of MIX1.
The major difference from the MIX1 is that MIX2 is equipped with a current control circuit for output and is controlled
by the AGC.
Input impedance of MIX2 is 330 to match the 10.7 MHz ceramic filter. Output impedance of Buff2 is 2 kto
match the 450 kHz ceramic filter.
IF signal input from pin 23 is also input to the detector of the RF AGC. The RF AGC is detected by both MIX1 and
MIX2 blocks.
The Buff1 and Buff2 ensure impedance matching between MIX1 and MIX2 outputs and each ceramic filter. As
a result, IFT design is not restricted by the need to match ceramic filter impedance. For turn ratio, etc., only conversion
gain need be taken input account, so it is easy to design.
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