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SCAN182374ASSC Просмотр технического описания (PDF) - Fairchild Semiconductor

Номер в каталоге
Компоненты Описание
производитель
SCAN182374ASSC
Fairchild
Fairchild Semiconductor Fairchild
SCAN182374ASSC Datasheet PDF : 12 Pages
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Functional Description
The SCAN182374A consists of two sets of nine edge-trig-
gered flip-flops with individual D-type inputs and 3-STATE
true outputs. The buffered clock and buffered Output
Enable pins are common to all flip-flops. Each set of the
nine flip-flops will store the state of their individual D inputs
that meet the setup and hold time requirements on the
Logic Diagram
LOW-to-HIGH Clock (ACP or BCP) transition. With the
Output Enable (AOE1 or BOE1) LOW, the contents of the
nine flip-flops are available at the outputs. When the Output
Enable is HIGH, the outputs go to the high impedance
state. Operation of the Output Enable input does not affect
the state of the flip-flops.
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Block Diagrams
Byte-A
Note: BSR stands for Boundary Scan Register
Tap Controller
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