MC33364D Просмотр технического описания (PDF) - Motorola => Freescale

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MC33364D

Critical Conduction Greenline SMPS Controller

Motorola => Freescale 

MC33364

In heavy load condition the ILED and Idiv is negligible. The

+ ǒ Ǔ * + ǒ Ǔ heavy load resistance is given by:

+ + + +* W Rheavy

Vout

Iout

6.0 V

2.0 A

3.0

Gc

20 log

fc

fph

A

20

log

14 kHz

177

The gain in absolute terms is:

23.82 dB

14.14 dB

The output filter pole at heavy load of this output is

+ + + p p m fpn

1

(2 RheavyCout)

1

(2 )(3)(300 F)

177 Hz

+ ń + ń + Ac 10(Gc 20) 10(14.14 20) 51

Now the compensation circuit elements can be calculated.

The output resistance of the voltage sense divider is given by

The gain exhibited by the open loop power supply at the

the parallel combination of resistors in the divider:

high input voltage will be:

2

+ ǒǒ * Ǔ Ǔ + * A

Vin max Vout Ns

(Vin max)(Verror)(Np)

(382 V 6.0 V)2(7)

(382 V)(1.2 V)(139)

+ + 15.53 23.82 dB

The maximum recommended bandwidth is approximately:

+ + + W Rin Rupper || Rlower 10 k || 14 k 5833

+ + [ R9 (Ac) (Rin) 29.75 k 30 k

+ ƪ ƫ + [ C8

1

p2 (Ac) (Rin) (fc)

382 pF 390 pF

+ + + fc

fs min

5

70 kHz

5

14 kHz

The gain needed by the error amplifier to achieve this

bandwidth is calculated at the rated load because that yields

The compensation zero must be placed at or below the

light load filter pole:

+ ƪ ƫ + [ C7

1

11.63 mF 10 mF

p2 (R9) (fpn)

the bandwidth condition, which is:

MOTOROLA ANALOG IC DEVICE DATA

9

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