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TZA3014U

2.5 Gbits/s postamplifier with level detector

Philips Electronics 

Philips Semiconductors

2.5 Gbits/s postamplifier with level detector

Product specification

TZA3014

FUNCTIONAL DESCRIPTION

The TZA3014 is a postamplifier with a RSSI circuit to

provide output signals for RSSI and LOS (see Fig.1). The

input signal can be amplified to a programmable level.

An active level control circuit ensures this level. The

control voltage on pin INV inverts the outputs, so avoiding

a required complicated Printed Circuit Board (PCB) layout.

An offset compensation circuit minimizes the effect of any

voltage offset present at the input.

The RSSI and LOS detector are based on a 7-stage

‘successive detection’ circuit which provides a logarithmic

output. The LOS detector is followed by a comparator with

a programmable threshold. The input signal level detection

is implemented to check if the input signal is above the

user-programmed level. The user can ensure that data will

only be transmitted when the input signal-to-noise ratio is

sufficient for low bit error rate system operation. A second

offset compensation circuit minimizes the effect of any

voltage offset present in the logarithmic amplifier.

handbook, halfpage

12 pF 420 Ω

50 Ω

IN

INQ

50 Ω

Fig.4 RF input circuit.

VCCA

GNDA

MGU125

RF input circuit

The input circuit contains internal 50 Ω resistors

decoupled to VCCA via an internal common mode 12 pF

capacitor (see Fig.4).

The inputs IN and INQ are DC-biased at approximately

VCCA − 0.33 V by an internal reference generator. The

TZA3014 can be DC-coupled, but AC coupling is

preferred. When DC-coupled, the drive source must

operate within the allowable input range

(VCCA − 1.0 V to VCCA + 0.3 V). The DC-offset voltage

should stay below a few millivolts since the internal

DC-offset compensation circuit has a limited correction

range. When AC-coupled, do not use capacitors that

cause a 3 dB cut-off point at 50 kHz (postamplifier cut-off

point) or at 1 MHz (RSSI cut-off point).

RF output circuit

Matching the outputs of the postamplifier (see Fig.5) is not

mandatory. In most applications, the receiving end of the

transmission line will be properly matched, causing very

few reflections.

Matching the transmitting end of the transmission line to

absorb reflections only, is recommended for very sensitive

applications.

In such cases, 100 Ω pull-up resistors should be

connected to VCCB and pins OUT and OUTQ as close as

possible to the IC. However, for most applications these

matching resistors are not required.

RF output level adjustment

The output level can be made compatible with CML or

PECL by adjusting the voltage on pin LEVEL. The

DC voltages on pins OUT and OUTQ relate to the

DC voltage on pin LEVEL. Due to the effect of the 50 Ω

load resistance at the receiving end, for a given

peak-to-peak value on pins OUT and OUTQ, a different

voltage is required on pin LEVEL in case the output is

AC-coupled and when the output is DC-coupled

(see Figs 5 and 6).

When pin LEVEL is not connected or connected to VCCA,

the postamplifier is in power-down state (see Fig.5).

DC-offset compensation loop

A DC-offset compensation loop connected between the

amplifier output and the buffer input maintains the toggle

point at the buffer input when there is no input signal

(see Fig.1). This active control circuit is integrated and

does not require an external capacitor. The loop

time constant determines the lower cut-off frequency of

the amplifier chain, and is internally fixed at approximately

5 kHz.

2001 Jun 25

7

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