NJVMJD44H11D3T4G(2016) Просмотр технического описания (PDF) - ON Semiconductor

Номер в каталоге

Компоненты Описание

производитель

NJVMJD44H11D3T4G
(Rev.:2016)

Complementary Power Transistors

ON Semiconductor 

MJD44H11 (NPN), MJD45H11 (PNP)

1

0.7 D = 0.5

0.5

0.3

0.2

0.2

0.1

0.1 0.05

0.07

0.05 0.02

0.03

0.01

0.02 SINGLE PULSE

0.01

0.01 0.02 0.03 0.05 0.1

RqJC(t) = r(t) RqJC

RqJC = 6.25°C/W MAX

D CURVES APPLY FOR POWER

PULSE TRAIN SHOWN

READ TIME AT t1

TJ(pk) - TC = P(pk) qJC(t)

P(pk)

t1

t2

DUTY CYCLE, D = t1/t2

0.2 0.3 0.5 1

2 3 5 10 20 30 50

t, TIME (ms)

Figure 1. Thermal Response

100 200 300 500 1 k

20

There are two limitations on the power handling ability of

10

500 ms 100 ms

a transistor: average junction temperature and second

5

breakdown. Safe operating area curves indicate IC − VCE

3

2

dc 5 ms

1 ms

limits of the transistor that must be observed for reliable

operation; i.e., the transistor must not be subjected to greater

1

0.5

THERMAL LIMIT @ TC = 25°C

0.3

WIRE BOND LIMIT

0.1

0.05

dissipation than the curves indicate.

The data of Figure 2 is based on TJ(pk) = 150_C; TC is

variable depending on conditions. Second breakdown pulse

limits are valid for duty cycles to 10% provided TJ(pk)

≤ 150_C. TJ(pk) may be calculated from the data in

Figure 1. At high case temperatures, thermal limitations will

reduce the power that can be handled to values less than the

0.02

1

3 5 7 10

20 30 50 70 100

limitations imposed by second breakdown.

VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)

Figure 2. Maximum Forward Bias

Safe Operating Area

TA TC

2.5 25

2 20

TC

1.5 15

1 10

0.5 5

TA

SURFACE

MOUNT

00

25

50

75

100

125

150

T, TEMPERATURE (°C)

Figure 3. Power Derating

www.onsemi.com

3

Share Link: