TQ9502 Просмотр технического описания (PDF) - TriQuint Semiconductor

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TQ9502

531/1063 Mbaud Fibre Channel Transmitter and Receiver

TriQuint Semiconductor 

TQ9501/TQ9502

Figure 2. TQ9502 – Receiver

RX, RY

2

RLX, RLY

2

LOOPEN

RATESEL

REFCLK

(25–31.25 MHz)

Mux

2

Clock/Data

Data

Recovery

(500–625 MBaud Clock

or 1.0–1.25 GBaud)

Serial-to-

Parallel

Converter 10

X 40

RX Clock

Generate

SYNCEN

RXD0..9

10

SYNC

RXCLK

(50–62.5 MHz

or 100–125 MH

CLKPOL

The LOOPEN (LOOP ENable) pin selects between the

two differential output pairs, TLX and TLY, or TX and

TY. LOOPEN = 1 selects the differential output TLX and

TLY, setting TX = 0 and TY = 1. Conversely, LOOPEN =

0 selects TX and TY, setting TLX = 0 and TLY = 1. This

relationship is shown in Table 1.

The PECL-to-TTL translator block is a differential PECL-

to-TTL translator. It is normally used for translating

PECL signals generated by optical receivers to TTL

signals to drive control circuitry.

Table 1. LOOPEN Configuration

LOOPEN

0

1

Rx Input

RX, RY

RLX, RLY

Tx Output

TX,TY

TLX, TLY

For additional information and latest specifications, see our website: www.triquint.com

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