AD7720 Просмотр технического описания (PDF) - Analog Devices
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производитель
AD7720 Datasheet PDF : 16 Pages
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AD7720–SPECIFICATIONS1 (AVDD = +5 V ؎ 5%; DVDD = +5 V ؎ 5%; AGND = DGND = 0 V, fMCLK = 12.5 MHz,
REF2 = +2.5 V; TA = TMIN to TMIN, unless otherwise noted)
Parameter
B Version
Units
Test Conditions/Comments
STATIC PERFORMANCE
Resolution
16
Differential Nonlinearity
±1
Integral Nonlinearity
±2
Precalibration Offset Error
±6
Precalibration Gain Error2
± 0.6
Postcalibration Offset Error3
± 1.5
Postcalibration Gain Error2, 3
± 0.3
Offset Error Drift
±1
Gain Error Drift
Unipolar Mode
±1
Bipolar Mode
± 0.5
Bits
LSB max
LSB typ
mV typ
% FSR typ
mV typ
% FSR typ
LSB/°C typ
LSB/°C typ
LSB/°C typ
When Tested with Ideal FIR Filter as in Figure 1
Guaranteed Monotonic
REF2 Is an Ideal Reference, REF1 = AGND
ANALOG INPUTS
Signal Input Span (VIN(+) – VIN(–))
Bipolar Mode
Unipolar Mode
Maximum Input Voltage
Minimum Input Voltage
Input Sampling Capacitance
Input Sampling Rate
Differential Input Impedance
± VREF2/2
0 to VREF2
AVDD
0
2
2 fMCLK
109/(8 fMCLK)
REFERENCE INPUTS
REF1 Output Voltage
REF1 Output Voltage Drift
REF1 Output Impedance
Reference Buffer Offset Voltage
Using Internal Reference
REF2 Output Voltage
REF2 Output Voltage Drift
Using External Reference
REF2 Input Impedance
External Reference Voltage Range
2.32 to 2.62
60
3
± 12
2.32 to 2.62
60
109/(16 fMCLK)
2.32 to 2.62
V max
V max
V
V
pF typ
MHz
kΩ typ
V min/max
ppm/°C typ
kΩ typ
mV max
V min/max
ppm/°C typ
kΩ typ
V min/max
BIP = VIH
BIP = VIL
Offset Between REF1 and REF2
REF1 = AGND
Applied to REF1 or REF2
DYNAMIC SPECIFICATIONS4
Bipolar Mode
Signal to (Noise + Distortion)5
Total Harmonic Distortion5
Spurious Free Dynamic Range
Unipolar Mode
Signal to (Noise + Distortion)5
Total Harmonic Distortion5
Spurious Free Dynamic Range
Intermodulation Distortion
AC CMRR
Overall Digital Filter Response
0 kHz–90.625 kHz
96.92 kHz
104.6875 kHz to 12.395 MHz
90
86/84.5
–90/–88
–90
88
84.5/83
–89/–87
–90
–93
96
± 0.005
–3
90
dB typ
dB min
dB max
dB max
dB typ
dB min
dB max
dB max
dB typ
dB typ
dB max
dB min
dB typ
When Tested with Ideal FIR Filter as in Figure 1
BIP = VIH, VCM = 2.5 V, VIN(+) = VIN(–) = 1.25 V p-p
or VIN(–) = 1.25 V, VIN(+) = 0 V to 2.5 V
Input BW = 0 kHz–90.625 kHz
Input BW = 0 kHz–90.625 kHz
Input BW = 0 kHz–90.625 kHz
BIP = VIL, VIN(–) = 0 V, VIN(+) = 0 V to 2.5 V
Input BW = 0 kHz–90.625 kHz
Input BW = 0 kHz–97.65 kHz
Input BW = 0 kHz–97.65 kHz
VIN(+) = VIN(–) = 2.5 V p-p, VCM = 1.25 V to
3.75 V, 20 kHz
See Figure 1 for Characteristics of FIR Filter
CLOCK
MCLK Duty Ratio
VMCLKH, MCLK High Voltage
VMCLKL, MCLK Low Voltage
45 to 55
4
0.4
% max
V min
V max
For Specified Operation
MCLK Uses CMOS Logic
–2–
REV. 0
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