TMP87PH48DFG Просмотр технического описания (PDF) - Toshiba
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TMP87PH48DFG Datasheet PDF : 142 Pages
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Caution in Setting the UART Noise Rejection Time
When UART is used, settings of RXDNC are limited depending on the transfer clock specified by BRG. The com-
bination "O" is available but please do not select the combination "–".
The transfer clock generated by timer/counter interrupt is calculated by the following equation :
Transfer clock [Hz] = Timer/counter source clock [Hz] ÷ TTREG set value
BRG setting
Transfer
clock [Hz]
000
fc/13
110
(When the transfer clock gen-
erated by timer/counter inter-
rupt is the same as the right
side column)
fc/8
fc/16
fc/32
The setting except the above
00
(No noise rejection)
O
O
O
RXDNC setting
01
(Reject pulses shorter
than 31/fc[s] as noise)
10
(Reject pulses shorter
than 63/fc[s] as noise)
O
O
–
–
O
–
11
(Reject pulses shorter
than 127/fc[s] as
noise)
–
–
–
O
O
O
–
O
O
O
O
2008-09-30
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