2246AH5C Просмотр технического описания (PDF) - Cadeka Microcircuits LLC.

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производитель

2246AH5C

Image Filter 11 x 10 bit, 60 MHz

Cadeka Microcircuits LLC. 

PRODUCT SPECIFICATION

Timing Diagram

CLK

D1-49-0

1

tS

DA

1/fCLK

2

3

tH

DB

C1-410-0

CA

CB

CONTROLS1

S15-02

Notes:

1. Except OEN.

2. Assumes OEN = LOW.

tPWH tPWKL

4

5

TMC2246A

6

tDO

tHO

SA

Application Notes

Typical Operation

The versatile input clock enables and unrestricted data and

coefficient inputs provided on the TMC2246A allow consid-

erable flexibility in numerous image and signal processing

architectures.

Table 2 shows a typical sequence of operations which clari-

fies the inherent latencies of the device and illustrates fixed

coefficient storage, product accumulation, and device recon-

figuration prior to beginning a new accumulation. This

assumes that the device is set to fractional two’s complement

mode (FSEL = LOW) with OCEN = LOW, OEN = LOW,

and the input registers configured to hold coefficients only

(ENSEL = LOW). X= “don’t care.”

Using the TMC2246A for Pixel Interpolation

As a companion product to the TMC2301 Image Resampling

Sequencer, the TMC2246A offers an excellent tool for per-

forming high-speed pixel interpolation and image filtering.

Any pixel resampling operation with multiple-pixel kernels

must utilize some parallel-processing technique, such as

memory banding, to maintain high-speed image throughput

rates. Memory banding utilizes adders to generate parallel

offset addresses, allowing the user to access multiple pixel

locations simultaneously. Using such techniques, one

TMC2246A can perform bilinear interpolation (four-pixel

kernel) with no loss in system performance.

Larger kernels can be realized in similar systems with addi-

tional TMC2246As. Figure 5 illustrates a basic pixel interpo-

lation application.

10

REV. 1.0.3 9/11/00

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