TMC2072KHC Просмотр технического описания (PDF) - Fairchild Semiconductor

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TMC2072KHC

Genlocking Video Digitizer

Fairchild Semiconductor 

PRODUCT SPECIFICATION

TMC2072

Interface to the TMC22x5y Decoder

The TMC22x5y Digital Video Decoders have been designed

to directly interface to the TMC2072 Digital Video Genlock.

The TMC2072 is the source for TMC22x9x input signals

CVBS7-0, GHSYNC, GVSYNC, LDV, and PXCK as shown

in Figure 20. These signals directly connect to the

TMC22x5y. The serial microprocessor interfaces for

TMC22x5y and TMC2072 are identical. The SDA and SCL

bus signals from the host microprocessor are shared by the

TMC22x5y and TMC2072. Only SA[2:0], VALID, and INT

signals are separate from the microprocessor bus.

CVBS7:0

8

GHSYNC

GVSYNC

PXCK

TMC2072

LDV

GENLOCKING VIDEO DIGITIZER

CVBS7:0

GHSYNC

GVSYNC

PXCK

LDV

TMC22x5y

DIGITAL VIDEO DECODER

MICROPROCESSOR INTERFACE

Figure 20. TMC22x5y Interface Circuit

65-2072-20

Printed Circuit Board Layout

Designing with high-performance mixed-signal circuits

demands printed circuits with ground planes. Wire-wrap is

not an option. Overall system performance is strongly influ-

enced by the board layout. Capacitive coupling from digital

to analog circuits may result in poor picture quality. Con-

sider the following suggestions when doing the layout:

1. Keep the critical analog traces (COMP,VREF, RT, RB,

DDS OUT, PFD IN, CBYP, and VIN1-3) as short as pos-

sible and as far as possible from all digital signals. The

TMC2072 should be located near the board edge, close

to the analog output connectors.

2. The digital power plane for the TMC2072 should be that

which supplies the rest of the digital circuitry. A single

power plane should be used for all of the VDD pins. If

the analog power supply for the TMC2072 is the same

as that of the system’s digital circuitry, power to the

TMC2072 VDDA pins should be decoupled with ferrite

beads and 0.1 µF capacitors to reduce noise.

3. The ground plane should be solid, nor cross-hatched.

Connections to the ground plane should have very short

leads.

4. Decoupling capacitors should be applied liberally to

VDD pins. Remember that not all power supply pins are

created equal. They typically supply adjacent circuits on

the device, which generate varying amounts of noise.

For best results, use 0.1µF capacitors in parallel with

10µF capacitors. Lead lengths should be minimized.

Ceramic chip capacitors are the best choice.

5. If the digital power supply has a dedicated power plane

layer, it should not overlap the TMC2072, the voltage

reference or the analog outputs. Capacitive coupling of

digital power supply noise from this layer to the

TMC2072 and its related analog circuitry can degrade

performance.

6. CLK should be handled carefully. Jitter and noise on

this clock or its ground reference may degrade perfor-

mance. Terminate the clock line carefully to eliminate

overshoot and ringing.

Related Products

• TMC22x9x Digital Video Encoders

• TMC2242/TMC2243/TMC2246 Video Filters

• TMC2081 Digital Video Mixer

• TMC22x5y Digital Decoders

• TMC2302 Image Manipulation Sequencer

REV. 1.0.4 6/19/01

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