TLE42694 Просмотр технического описания (PDF) - Infineon Technologies
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TLE42694 Datasheet PDF : 33 Pages
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4.3
Thermal Resistance
TLE42694
General Product Characteristics
Table 6 Thermal Resistance
Parameter
Symbol
Values
Unit Note / Test Condition Number
Min. Typ. Max.
TLE42694G (PG-DSO-8)
Junction to Soldering Point1)
Junction to Ambient1)
Junction to Ambient1)
Junction to Ambient1)
RthJSP
–
RthJA
–
RthJA
–
RthJA
–
80 –
113 –
170 –
142 –
K/W measured to pin 5
K/W FR4 2s2p board2)
P_4.3.1
P_4.3.2
K/W FR4 1s0p board,
footprint only3)
P_4.3.3
K/W FR4 1s0p board,
P_4.3.4
300mm2 heatsink area
on PCB3)
Junction to Ambient1)
RthJA
–
136 –
K/W FR4 1s0p board,
P_4.3.5
600mm2 heatsink area
on PCB3)
TLE42694GM (PG-DSO-14)
Junction to Soldering Point1)
Junction to Ambient1)
Junction to Ambient1)
Junction to Ambient1)
RthJSP
–
RthJA
–
RthJA
–
RthJA
–
27 –
63 –
104 –
73 –
K/W measured to group of P_4.3.6
pins 3, 4, 5, 10, 11, 12
K/W FR4 2s2p board2)
P_4.3.7
K/W FR4 1s0p board,
footprint only3)
P_4.3.8
K/W FR4 1s0p board,
P_4.3.9
300mm2 heatsink area
on PCB3)
Junction to Ambient1)
RthJA
–
65 –
K/W FR4 1s0p board,
P_4.3.10
600mm2 heatsink area
on PCB3)
TLE42694E (PG-SSOP-14 exposed pad)
Junction to Soldering Point1)
Junction to Ambient1)
Junction to Ambient1)
RthJSP
–
RthJA
–
RthJA
–
10 –
47 –
145 –
K/W measured to pin 5
FR4 2s2p board2)
K/W FR4 1s0p board,
Footprint only3)
P_4.3.11
P_4.3.12
P_4.3.13
Junction to Ambient1)
Junction to Ambient1)
RthJA
–
63 –
K/W FR4 1s0p board,
P_4.3.14
300mm2 heatsink area
on PCB3)
RthJA
–
53 –
K/W FR4 1s0p board,
P_4.3.15
600mm2 heatsink area
on PCB3)
1) not subject to production test, specified by design
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
3) Specified RthJA value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The Product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70µm Cu).
Data Sheet
11
Rev. 1.3, 2014-07-03
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