HT62L256-28TSOP-A Просмотр технического описания (PDF) - Holtek Semiconductor

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HT62L256-28TSOP-A

CMOS 32K
x8 Low Power SRAM

Holtek Semiconductor 

Preliminary

HT62L256

Note:

1. WE must be high during all address transitions

2. A write occurs during the overlap (tWP) of a low CS and a low WE

3. tWR is measured from the earliest high going edge of CS or WE to the end of the write cycle

4. During this period, I/O pins are in the output state, so the input signals of opposite phase to the outputs

should not be applied.

5. If the CS low transition occurs simultaneously or after with the WE low transition, the outputs remain in a

high impedance state

6. OE is continuously low (OE=VIL)

7. DOUT is at the same phase as the write data of this write cycle

8. DOUT is the read data of the next address

9. If CS is low during this period, then the I/O pins are in the output state and the data input signals of the

opposite phase to the outputs should not be applied

10. Transition is measured at ±500mV from the steady state

Rev. 0.00

7

August 15, 2002

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