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TJA1086 Просмотр технического описания (PDF) - NXP Semiconductors.

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TJA1086
NXP
NXP Semiconductors. NXP
TJA1086 Datasheet PDF : 62 Pages
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NXP Semiconductors
TJA1086
FlexRay active star coupler
Table 2. Pin description …continued
Symbol Pin
Type[1] Description
LWU 16
I
local wake-up input; internal pull-up or pull-down (depends on
voltage at pin LWU)
VBAT
17
P
n.c.
18
-
battery supply voltage
not connected; to be connected to GND in application
GND2 19
G
ground connection 2[2]
n.c.
20
-
not connected; to be connected to GND in application
VBUF2 21
P
VCC2
22
P
n.c.
23
-
buffer supply voltage 2[3]
supply voltage 2[4]
not connected; to be left open in the application
n.c.
24
-
not connected; to be left open in the application
n.c.
25
-
not connected; to be connected to GND in application
n.c.
26
-
not connected; to be left open in the application
n.c.
27
-
not connected; to be left open in the application
n.c.
28
-
not connected; to be connected to GND in application
BM_2 29
IO
bus line minus for branch 2[5]
BP_2 30
IO
bus line plus for branch 2[6]
n.c.
31
-
not connected; to be connected to GND in application
BM_1 32
IO
bus line minus for branch 1[5]
BP_1 33
IO
bus line plus for branch 1[6]
VCC1
34
P
VBUF1 35
P
n.c.
36
-
supply voltage 1[4]
buffer supply voltage 1[3]
not connected; to be connected to GND in application
GND1 37
G
ground connection 1[2]
RES6 38
-
reserved; to be connected to GND in application
RES5 39
-
reserved; to be connected to GND in application
RES4 40
-
reserved; to be connected to GND in application
RES3 41
-
reserved; to be connected to GND in application
RES2 42
-
reserved; to be connected to GND in application
RES1 43
-
reserved; to be connected to GND in application
RSTN 44
I
reset input; internal pull-up
[1] IO: input/output; O: output; I: input; P: power supply; G: ground.
[2] GND1, GND2, GNDD and the exposed center pad of HVQFN44 package must be connected together on
the PCB; references in the data sheet to GND can be assumed to encompass GND1, GND2, GNDD and
the exposed center pad of HVQFN4 unless stated otherwise.
[3] VBUF1 and VBUF2 must be connected together on the PCB; note that references in the data sheet to VBUF
can be assumed to encompass VBUF1 and VBUF2 unless stated otherwise.
[4] VCC1 and VCC2 must be connected together on the PCB; note that references in the data sheet to VCC can
be assumed to encompass VCC1 and VCC2 unless stated otherwise.
[5] References in the data sheet to BM (e.g. pin BM or VBM) can be assumed to encompass BM_1 and BM_2
unless stated otherwise.
[6] References in the data sheet to BP (e.g. pin BP or VBP) can be assumed to encompass BP_1 and BP_2
unless stated otherwise.
TJA1086
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2013
© NXP B.V. 2013. All rights reserved.
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