TGA4953-SL(2007) Просмотр технического описания (PDF) - TriQuint Semiconductor
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TGA4953-SL Datasheet PDF : 19 Pages
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Parameter
Eye Amplitude
Additive Jitter
(RMS)
Q-Factor
Delta Eye
Amplitude
Delta Crossing
Percentage
TABLE III
RF CHARACTERIZATION TABLE
(TA = 25°C, Nominal)
Product Datasheet
May 9, 2007
TGA4953-SL
Test Conditions Min
Typ Max Units Notes
VD2T = 8.0V
VD2T = 6.5V
VD2T = 5.5V
VD2T = 4.5V
VD2T = 4.0V
VIN = 500mVPP
VIN = 800mVPP
VIN = 250mVPP
VIN = 500mVPP
VIN = 800mVPP
250mVPP
800mVPP
10
8.0
7.0
6.0
5.5
26.5
28.5
28.5
VPP 3/ 4/
0.9
1.0
2.0
2.0
Ps
5/
32
35
V/V
35
0.45
0.10
VPP
| 500–800 mV in p-p|
6
%
Table III Notes:
1/ Verified at package level RF test
2/ Package RF Test Bias: Vdd = 5V, adjust VG1 to achieve Idd = 65mA then adjust VG2 to
achieve Idd = 200mA, VCTRL1 = -0.2V & VCTRL2 = +0.2 V
3/ Verified by design, SMT assembled onto a demonstration board detailed on sheet 6.
4/ VIN = 250mV, Data Rate = 10.7Gb/s, VD1 = VD2T or greater, VCTRL2 and VG2 are adjusted for
maximum output
5/ Computed using RSS Method where JRMS_DUT = √(JRMS_TOTAL2 - JRMS_SOURCE2)
6/ Verified at die level on-wafer probe
7/ Power Bias Die Probe: VTEE = 8V, adjust VG to achieve Idd = 175mA ±5%, VCTRL = +1.5V
8/ Value is the difference with the 500mV input measurement. Result is the absolute value.
Note: At the die level, drain bias is applied through the RF output port using a bias tee, voltage
is at the DC input to the bias tee
TriQuint Semiconductor Texas : (972)994-8465 Fax (972)994-8504 Web: www.triquint.com
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