TDF8599A Просмотр технического описания (PDF) - NXP Semiconductors.

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TDF8599A

I2C-bus controlled dual channel 135 W/4Ω, single channel 250 W/2Ω class-D power amplifier with load diagnostics

NXP Semiconductors. 

NXP Semiconductors

TDF8599A

I2C-bus controlled dual channel class-D power amplifier

Table 4. I2C-bus mode operation

Pin EN

Pin SEL_MUTE

HIGH (S2 closed)

HIGH

LOW

LOW

LOW (S2 open)

X[1]

[1] X = do not care.

Bit IB1[D0]

1

1

0

X[1]

Bit IB2[D0]

0

1

X[1]

X[1]

Mode

Operating mode

Mute mode

Standby mode

off (default)

Table 5. Non-I2C-bus mode operation

Pin EN

Pin SEL_MUTE

HIGH (S2 closed)

HIGH (S1 open)

LOW (S1 closed)

LOW (S2 open)

X[1]

[1] X = do not care.

Mode

Operating mode

Mute mode (default)

off

8.3 Pulse-width modulation frequency

The output signal from the amplifier is a PWM signal with a clock frequency of fosc. This

frequency is set by connecting a resistor (Rosc) between pins OSCSET and AGND. The

optimal clock frequency setting is between 300 kHz and 400 kHz. Connecting a resistor

with a value of 39 kΩ, for example, sets the clock frequency to 320 kHz (see Figure 5).

The external capacitor (Cosc) has no influence on the oscillator frequency. It does

however, reduce jitter and sensitivity to disturbance. Using a 2nd order LC demodulation

filter in the application generates an analog audio signal across the loudspeaker.

8.3.1 Master and slave mode selection

In a master and slave configuration, multiple TDF8599A devices are daisy-chained

together in one audio application with a single device providing the clock frequency signal

for all other devices. In this situation, it is recommended that the oscillators of all devices

are synchronized for optimum EMI behavior as follows:

All OSCIO pins are connected together and one TDF8599A in the application is

configured as the clock-master. All other TDF8599A devices are configured as

clock-slaves (see Figure 5).

• The clock-master pin OSCIO is configured as the oscillator output. When a resistor

(Rosc) is connected between pins OSCSET and AGND, the TDF8599A is in Master

mode.

• The clock-slave pins OSCIO are configured as the oscillator inputs. When pin

OSCSET is directly connected to pin AGND (see Table 6), the TDF8599A is in Slave

mode.

Table 6.

Mode

Master

Slave

Mode setting pin OSCIO

Settings

Pin OSCSET

Rosc > 26 kΩ

Rosc = 0 Ω; shorted to pin AGND

Pin OSCIO

output

input

TDF8599A_2

Product data sheet

Rev. 02 — 30 June 2009

© NXP B.V. 2009. All rights reserved.

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