TDA9203A Просмотр технического описания (PDF) - STMicroelectronics
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TDA9203A Datasheet PDF : 13 Pages
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TDA9203A
FUNCTIONAL DESCRIPTION (continued)
OSD Inputs
The TDA9203A includes all the circuitry necessary
to mix OSDsignals intothe RGB main-picture. Four
pins are dedicated to this function as follow.
Three TTL RGB On Screen Display inputs (Pin 2,
5 and 8). These three inputs are connected to the
three outputs of the corresponding ON-SCREEN-
DISPLAY processor (ex : STV942x).
One Fast Blanking Input (FBLK, Pin 13) which is
also connected to the FBLK output of the same
ON-SCREEN-DISPLAY processor.
When a high level is present on FBLK, the IC will
acts as follow :
- The three main picture RGB input signals are
internally switched to the internal input clamp
reference voltage.
- The three output signals are set to voltages cor-
respondingto the state (0 or 1) on the three OSD
inputs (see Figure 4).
Example :
If FBLK = 1 and OSD1, OSD2, OSD3) = 1, 0, 1
respectively.
Then OUT1, OUT2, OUT3 will be equal to VOSD,
VBRT, VOSD,
where : VBRT = VBLACK + BRT, VOSD = VBRT + OSD
BRT is the brightness DC level I2C adjustable.
OSD is the On-Screen Display signal value I2C
adjustable from 0V to 5.5VPP by step of 0.36V.
Semi-transparent function is controlled thanks to
Bit 6 of R8 register (see Table 1).
When semi-transparent mode is activated, video
signal is divided by 2 (CONT).
Table 1
FBLK
0
1
0
1
1
1
1
OSD1 OSD2 OSD3
x
x
x
x
x
x
x
x
x
0
x
x
x
1
x
x
x
0
1
0
1
B6R8
0
0
1
1
1
1
1
Output
Signal (OUTn)
Video
OSD (1)
Video
OSD
OSD
OSD
Semi-trans-
parent (2)
Notes : 1. All OSD colors are displayed.
2. One OSD color is displayed as semi-transparent video
without effect on brightness and DC level adjustment.
Output Stage
The three output stagesincorporate threefunctions
which are :
- The blanking stage : When high level is applied
to the BLK input (Pin 14), the three outputs are
switched to a voltage which is 400mV lower than
the BLACK level. The black level is the output
voltage with minimum brightness when input sig-
nal video amplitude is equal to ”0”.
- The output stage itself : It is a large bandwidth
output amplifier which allow to deliver up to 5VPP
on the three outputs (for 0.7V video signal on the
inputs).
- The output CLAMP : The IC also incorporates
three internal output clamp (sample and hold
system) which allow to DC shift the three output
signals. The DC output voltage is adjustable
through I2C with 4 bits. Practicaly, the DC output
level allow to adjust the BLK level (VDC = 400mV
under VBLACK) from 0.9V to 2.9V with 12 x 165mV.
The overall waveforms of the output signal accord-
ing to the different adjustment are shown in Fig-
ures 4 and 5.
Serial Interface
The 2-wires serial interface is an I2C interface.
The slave address of the TDA9203A is DC (in
hexadecimal).
A6 A5 A4 A3 A2 A1 A0 W
1
1
0
1
1
1
0
0
Data Transfer
The host MCU can write data into the TDA9203A
registers. Read mode is not available.
To write data into the TDA9203A, after a start, the
MCU must send (see Figure 6) :
- The I2C addressslave byte with a low level for the
R/W bit.
- The byte of the internal register address where
the MCU wants to write data(s).
- The data.
All bytes are sent MSB bit first and the write data
transter is closed by a stop.
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