TDA8024T/C1 Просмотр технического описания (PDF) - NXP Semiconductors.

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производитель

TDA8024T/C1

Standard smart card interface

NXP Semiconductors. 

NXP Semiconductors

TDA8024

Standard smart card interface

The crystal oscillator runs as soon as the IC is powered up. If the crystal oscillator is used,

or if the clock pulse on pin XTAL1 is permanent, the clock pulse is applied to the card as

shown in the activation sequences shown in Figure 7 and 8.

If the signal applied to XTAL1 is controlled by the system microcontroller, the clock pulse

will be applied to the card when it is sent by the system microcontroller (after completion

of the activation sequence).

8.4 I/O transceivers

The three data lines I/O, AUX1 and AUX2 are identical.

The Idle-state is realized by both I/O and I/OUC lines being pulled HIGH via a 11 k

resistor (I/O to VCC and I/OUC to VDD).

Pin I/O is referenced to VCC, and pin I/OUC to VDD, thus allowing operation when VCC is

not equal to VDD.

The first side of the transceiver to receive a falling edge becomes the master. An anti-latch

circuit disables the detection of falling edges on the line of the other side, which then

becomes a slave.

After a time delay td(edge), an N-transistor on the slave side is turned on, thus transmitting

the logic 0 present on the master side.

When the master side returns to logic 1, a P-transistor on the slave side is turned on

during the time delay tpu and then both sides return to their idle states.

This active pull-up feature ensures fast LOW-to-HIGH transitions; as shown in Figure 6, it

is able to deliver more than 1 mA at an output voltage of up to 0.9VCC into an 80 pF load.

At the end of the active pull-up pulse, the output voltage depends only on the internal

pull-up resistor and the load current.

The current to and from the card I/O lines is limited internally to 15 mA and the maximum

frequency on these lines is 1 MHz.

TDA8024

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 4.0 — 3 June 2016

© NXP Semiconductors N.V. 2016. All rights reserved.

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