TDA7553 Просмотр технического описания (PDF) - STMicroelectronics
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TDA7553 Datasheet PDF : 12 Pages
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TDA7550R - TDA7550 - TDA7551 - TDA7552 - TDA7553
addressable DRAM
– Refresh rate for DRAM can be chosen
among sixteen divide factors
– SRAM or DRAM relative addressing modes
– 222=4MBytes addressable SRAM
– Four SRAM Timing choices
– Two Read Offset Register
PLL
The Euterpe clock system generates the fol-
lowing clocks:
– DCLK
the DSP core clock
– MCLK
CODEC master clock
– LRCLK
left/right clock for the SAI and
the CODEC
– SCLK
shift serial clock for the SAI and
the CODEC
The output of the PLL operates from 70 to 140
MHz. The DSP core can operate with a clock
up to 50 MHz.
From the VCO output the audio clock are de-
rived.
CODEC
The main features of the CODEC are listed be-
low:
– one 16-bit Delta Sigma Stereo ADC
– 80 dB Dynamic Range
– Oversampling Ratio: 128
– one 16-bit Delta Sigma Stereo DAC
– 80 dB Dynamic Range
– Interpolating Ratio: 128
– Sampling rates of 4kHz to 48kHz
– Signal Noise Ratio: 80 dB Typ.
The analog interface is in the form of differen-
tial signals for each channel. The interface on
the digital side has the form of an SAI interface
and can interface directly to an SAI channel
and then to the DSP core.
DEVICE versions
Part No.
TDA7550R
Internal
Program
Memory
RAM
TDA7550
ROM
Function
One of the
below
Speech
Recognition
Serial I/F
Master or
Slave I2C
Slave I2C
External
Memory
FLASH
or RAM
FLASH
TDA7551
Speaker
Verification
Slave I2C
Optional
FLASH
TDA7552
Text-To-
Slave I2C
–
Speech
TDA7553
SF/FDE
Master
I2C or SPI
(RAM)
Note: TDA7550 requires word databases on FLASH (cfr. Document words)
Audio
Input
Audio
Output
Software
YES
(by appl.)
YES, 1
(voice in)
YES, 1
(voice in)
NO
YES, 1
(voice in)
YES
(by appl.)
YES
(prompts)
YES
(prompts)
YES
(voice out)
YES
(filtered)
Custom
Specs.
ASR-311
Engine by
Lernout &
Hauspie
SV208
Engine by
Lernout &
Hauspie
TTS3000
Engine by
Lernout &
Hauspie
Engine by
NCTI
7/12
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