DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

TDA7500A Просмотр технического описания (PDF) - STMicroelectronics

Номер в каталоге
Компоненты Описание
производитель
TDA7500A
ST-Microelectronics
STMicroelectronics ST-Microelectronics
TDA7500A Datasheet PDF : 41 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
TDA7500A
PIN DESCRIPTION (continued)
14 CLKIN
Name
15 AVDD
16 XTI
17 XTO
18 AGND
19 RDSINT/DSP1_GPIO4
20 RDSARI_SCK/DSP1_GPIO3
21 RDSQAL_SO/DSP1_GPIO2
22 RDSDAT_SI/DSP1_GPIO1
23 RDSCLK_SS/DSP1_GPIO0
24 INT
25 CGND1
26 CVDD1
27 SCRCCD
28 SCRMD
29 DSRA<7>
30 DSRA<6>
Type
Description
I Clock Input pin (Input). Clock from external digital audio source
to synchronize the internal PLL.
Supply pin dedicated to the PLL.
I Crystal Oscillator Input (Input). External Clock Input or crystal
Oscillator input.
O Crystal Oscillator Output (Output). Crystal Oscillator output
drive.
Ground pin dedicated to the PLL.
O RDS bit/block interrupt (Output)/General Purpose I/O (Input/
Output). Provides an interrupt to the main micro. Optionally it
can be used as general purpose I/O controlled by DSP1.
O SPI Bit Clock (Input)/ARI indicator (Output)/General Purpose I/O
(Input/Output). If SPI interface is enabled, behaves as SPI bit
clock. Optionally it provides the ARI indication bit. Optionally it
can be used as general purpose I/O controlled by DSP1.
O SPI Slave Output Serial Data (Output)/RDS Bit Quality (Output)/
General Purpose I/O (Input/Output). If SPI is enabled, behaves
as Serial Data Output. Optionally it provides the RDS serial data
quality information. Optionally it can be used as general purpose
I/O controlled by DSP1.
I SPI Slave Input Serial Data (Input)/RDS Bit Data (Output)/
General Purpose I/O (Input/Output). If SPI is enabled, behaves
as Serial Data Input. Optionally it provides the RDS serial data
stream. Optionally it can be used as general purpose I/O
controlled by DSP1.
I SPI Chip Select (Input)/RDS Bit Clock (Output)/General
Purpose I/O (Input/Output). If SPI is enabled, behaves as Chip
Select line for SPI bus. Optionally it provides the 1187.5Hz RDS
Bit Clock. Optionally it can be used as general purpose I/O
controlled by DSP1.
I External interrupt line (Input). When this line is asserted low, the
DSP may be interrupted. Acts as IRQA line of DSP0 core.
Ground pin dedicated to the digital circuitry.
Supply pin dedicated to the digital circuitry.
I SPDIF Input 1 (Input). Stereo SPDIF input to connect a digital
audio source like a CD.
I SPDIF Input 2 (Input). Stereo SPDIF input to connect a digital
audio source like a MD.
I/O DSP SRAM Data Lines<7> (Input/Output). When in SRAM
Mode this pin act as the EMI data line 7.
I/O DSP SRAM Data Lines<6> (Input/Output). When in SRAM
Mode this pin act as the EMI data line 6.
4/40

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]