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TDA7500A

DIGITAL AM/FM SIGNAL PROCESSOR

STMicroelectronics 

PIN DESCRIPTION

N°

Name

1 GND1

2 VDD1

3 TESTEN

4 TESTSE

5 NRESET

6 SCKM/DSP0_GPIO0

7 MISOM/DSP0_GPIO1

8 MOSIM/DSP0_GPIO2

9 SSM/DSP0_GPIO3

10 SCKD/DSP0_GPIO4

11 MISOD/DSP0_GPIO5

12 MISOD/DSP0_GPIO6

13 SSD/DSP0_GPIO7

TDA7500A

Type

Description

Ground pin dedicated to the digital circuitry.

Supply pin dedicated to the digital circuitry.

I Test Enable (Input). When low, puts the chip into test mode and

muxes the XTI clock to all flip-flops. When TEST_SE is also

active, the scan chain shifting is enabled. To be connected to

Vdd in operating mode.

I SCAN Enable (Input). When high with TESTEN also active,

controls the shifting of the internal scan chains. When active with

TESTEN not active, sets all tri-state outputs into hi-impedance

mode. To be connected to GND in operating mode.

I System Reset (Input). A low level applied to NRESET input

initializes the IC.

I/O I2C Serial Clock Line (Input/Output)/SPI Bit Clock (Input)/

General Purpose I/O (Input/Output). Clock line for I2C bus. If SPI

interface is enabled, behaves as SPI bit clock. Optionally it can

be used as general purpose I/O controlled by DSP0.

I/O I2C Serial Data Line (Input/Output)/SPI Master Input Slave

Output Serial Data (Input/Output)/General Purpose I/O (Input/

Output). Data line for I2C bus. If SPI is enabled, behaves as

Serial Data Input when in SPI Master Mode and Serial Data

Output when in SPI Slave Mode. Optionally it can be used as

general purpose I/O controlled by DSP0.

I/O SPI Master Output Slave Input Serial Data (Input/Output)/

General Purpose I/O (Input/Output). Serial Data Output when in

SPI Master Mode and Serial Data Input when in SPI Slave

Mode. Optionally it can be used as general purpose I/O

controlled by DSP0.

I SPI Slave Select (Input)/General Purpose I/O (Input/Output). If

SPI is enabled, behaves as Slave Select line for SPI bus.

Optionally it can be used as general purpose I/O controlled by

DSP0.

I SPI Bit Clock (Input)/General Purpose I/O (Input/Output). SPI bit

clock. Optionally it can be used as general purpose I/O

controlled by DSP0.

I/O SPI Master Input Slave Output Serial Data (Input/Output)/

General Purpose I/O (Input/Output). Behaves as Serial Data

Input when in SPI Master Mode and Serial Data Output when in

SPI Slave Mode. Optionally it can be used as general purpose I/

O controlled by DSP0.

I/O SPI Master Output Slave Input Serial Data (Input/Output)/

General Purpose I/O (Input/Output). Serial Data Output when in

SPI Master Mode and Serial Data Input when in SPI Slave

Mode. Optionally it can be used as general purpose I/O

controlled by DSP0.

I SPI Slave Select (Input)/General Purpose I/O (Input/Output).

Behaves as Slave Select line for SPI bus. Optionally it can be

used as general purpose I/O controlled by DSP0.

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