Philips Semiconductors
Stereo continuous calibration DAC
Preliminary specification
TDA1545A
CHARACTERISTICS
VDD = 5 V; Tamb = 25 °C; measured in the circuit of Fig.1; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
VDD
supply voltage
3.0
IDD
supply current
note 1
−
RR
ripple rejection
note 2
−
Digital inputs (WS; BCK; DATA)
|IIL|
input leakage current LOW
VI = 0.8 V
−
|IIH|
input leakage current HIGH
VI = 2.4 V
−
fBCK
bit clock input frequency
−
BR
bit rate data input
−
fWS
word select input
−
Timing (see Fig.5)
tr
rise time
−
tf
fall time
−
tCY
bit clock cycle time
54
tHB
bit clock HIGH time
15
tLB
bit clock LOW time
15
tSU;DAT data set-up time
12
tHD;DAT data hold time
2
tHD;WS
word select hold time
2
tSU;WS
word select set-up time
12
Analog input (IREF)
RREF
reference resistor
see Fig.1
7.4
Analog outputs (IOL and IOR)
RES
resolution
−
VDCC
DC output voltage compliance
2.0
IFS
full-scale current
0.9
TCFS
full-scale temperature coefficient
−
Ibias
bias current
643
AFS
reference input current to
−
full-scale output current gain
Abias
reference input current to bias
−
current gain
TYP.
5.0
3.0
30
−
−
−
−
−
−
−
−
−
−
−
−
−
−
11.0
−
−
1.0
±400
714
13.2
9.42
MAX.
5.5
4.0
−
UNIT
V
mA
dB
10
µA
10
µA
18.4 MHz
18.4 Mbits/s
384
kHz
12
ns
12
ns
−
ns
−
ns
−
ns
−
ns
−
ns
−
ns
−
ns
14.6 kΩ
16
bit
VDD − 1 V
1.1
mA
−
ppm
785
µA
−
−
1997 Sep 04
8