TC5299J Просмотр технического описания (PDF) - Unspecified
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TC5299J Datasheet PDF : 32 Pages
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TC5299J
TC5299J Controller actually has 32k-address range but only does partial decoding on these devices. 0000H – 001FH is
PROM address and 4000H – 7FFFH is Buffer RAM address, otherwise is reserved. To access either the PROM or the
RAM buffer which user must initiate a Remote DMA transfer between the I/O port and memory.
Remote Read/Write Cache:
The TC5299J Controller includes 4 words cache internally. On a remote read the TC5299J Controller moves data from
memory buffer to the cache buffer; the TC5299J moves data continuously until the cache buffer is full. On a remote
write the system can writes data into the cache buffer until the 4 words cache buffer is full.
4.3 Attribute Memory Mapping
PCMCIA CIS Structures & Decode Function:
The TC5299J supports access to 1K of attribute Memory. Attribute memory is defined by the PCMCIA standard to be
comprised of the card information structure and four 8-bits Card Configuration Registers. These four registers are
contained in the TC5299J.
4.3.1 Attribute Memory Map
The attribute Memory map for a PCMCIA card is shown below.
Address
00H-3E0H
3F0H (CCR4)
3F2H (CCR5)
3F4H-3F6H
3F8H(CCR0)
3FAH(CCR1)
3FCH(CCR2)
3FEH(CCR3)
Description
Attribute Memory
I/O Event indication Register
Control Register
Reserved
Configuration Option Register
Card Configuration and Status Register
Pin Replacement Register
Reserved
Card Option Registers 0 (R/W): 3F8H (CCR0)
D7
D6
D5
D4
D3
D2
D1
D0
SRESET XX
PCMIOEN XX
XX
XX
PJ1
PJ0
Name
PJ0-PJ1
PCMIOEN
SRESET
XX
Description
If JMP1 pulled low during power on reset and FUNC=0, The two bits select one of
4 I/O base address. (shows as below)
To set high make the card enter I/O mode. The function also can be set by JMP0
(MCS) when Power On Reset.
Setting this bit to high, place the card enter reset mode.
Reserved
JMP1 does not pull-low during power on reset.
-11-
Ver. 0.1
07/04/01
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