LC895994 Просмотр технического описания (PDF) - SANYO -> Panasonic

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Компоненты Описание

производитель

LC895994

CD-R Encoder/Decoder LSI with Built-in ATAPI (IDE) Interface

SANYO -> Panasonic 

LC895994

Pin Descriptions

Pin No.

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

Pin Name

VSS

Reserve0

Reserve1

Reserve2

TEST1

XTALCK

XTAL

TEST2

MCK

TEST3

PSUBSYNC

EXTACK

TEST4

VDD

VSS

CLV+ (MDP)

CLV– (MDS)

MON

FSW

VDD

VSS

PLLOUTIN

ROUGH

LOCKIN

LOCK

ERROR

ATIPSYNC

BIDATAI

BICLKIN

DATACKO

IO0

IO1

IO2

IO3

IO4

IO5

IO6

IO7

IO8

VDD

VSS

Type: I: Input pin, O: Output pin, B: Bidirectional pin, P: Power supply pin, N: No connection pin

Type

Description

P

O Reserved for future expansion (Must be left open if unused.)

I Reserved for future expansion (Must be tied to ground if unused.)

I Reserved for future expansion (Must be tied to ground if unused.)

I Test pin (connect to VSS)

I Crystal oscillator circuit input pin (17.2872 to 69.1488 MHz)

O Crystal oscillator circuit output pin

I Test pin (connect to VSS)

O Master Clock output pin

I Test pin (connect to VSS)

O Pseudo-subcode synchronization output

O ATIP synchronization acknowledge signal output

I Test pin (connect to VSS)

P

P

O

O

CLV servo signal output pins

O

O

P

P

I Wobble signal carrier clock input pin

I Rough CLV servo wobble signal input pin

I CD decoder lock signal input pin

O CLV servo lock monitor pin

O ATIP parity error detection pin

B ATIP synchronization signal I/O pin

I Biphase data input pin

I Biphase data transfer clock input pin

O 4.3218 MHz (normal speed) oscillator output

B

B

B

B

B Data signal pins for ROM encoder/decoder buffer RAM, with pull-up resistors

B

B

B

B

P

P

Continued on next page.

No. 5824-4/7

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